ggow
265 lines
6.9 KiB
C
265 lines
6.9 KiB
C
#include <linux/pm.h>
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#include <linux/bug.h>
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#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) || defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
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#include <linux/memblock.h>
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#include <linux/bootmem.h>
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#include <mach/mtk_boot_share_page.h>
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#endif
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/smp_scu.h>
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#include <asm/page.h>
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#include <mach/mt_reg_base.h>
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#include <mach/irqs.h>
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#include <linux/version.h>
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#include <mach/mt_spm_sleep.h>
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#include <mach/mt_spm.h>
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extern void arm_machine_restart(char mode, const char *cmd);
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extern struct sys_timer mt6582_timer;
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extern void mt6582_timer_init(void);
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
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extern struct smp_operations mt65xx_smp_ops;
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#endif
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extern void mt_fixup(struct tag *tags, char **cmdline, struct meminfo *mi);
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extern void mt_reserve(void);
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/* Added by haitaoy@amazon.com for AUSTINPLAT-1413. */
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struct mt_wake_event_map mt8127_event_map[] = {
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{
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.domain = "SPM",
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.code = 10, /* for WAKE_SRC_CONN */
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.we = WEV_WIFI,
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.irq = 10,
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},
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/* Examples for tracing other types of wake source or event. */
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#if 0
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{
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.domain = "SPM",
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.code = 21, /* for WAKE_SRC_THERM */
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.we = WEV_THERM,
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.irq = 21,
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},
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{
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.domain = "IRQ",
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.code = MT_CONN2AP_BTIF_WAKEUP_IRQ_ID, /* BTIF_WAKEUP_IRQ_ID */
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.we = WEV_BT,
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.irq = MT_CONN2AP_BTIF_WAKEUP_IRQ_ID, /* BTIF_WAKEUP_IRQ_ID */
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},
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#endif
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{ /*empty*/ }
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};
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void __init mt_init(void)
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{
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/* enable bus out of order command queue to enhance boot time */
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#if 1
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volatile unsigned int opt;
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opt = readl(IOMEM(MCU_BIU_BASE));
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opt |= 0x1;
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writel(opt, IOMEM(MCU_BIU_BASE));
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dsb();
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#endif
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/* Added by haitaoy@amazon.com for AUSTINPLAT-1413. */
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spm_set_wakeup_event_map(mt8127_event_map);
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}
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#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) || defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
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void __init mt_init_early(void)
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{
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int ret;
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ret = reserve_bootmem(__pa(BOOT_SHARE_BASE), 0x1000, BOOTMEM_EXCLUSIVE);
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if (ret < 0)
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{
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printk(KERN_WARNING "reserve_bootmem BOOT_SHARE_BASE failed %d\n", ret);
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}
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}
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#endif
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static struct map_desc mt_io_desc[] __initdata =
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{
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#if !defined(CONFIG_MT8127_FPGA)
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{
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.virtual = INFRA_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(INFRA_BASE)),
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.length = (SZ_1M - SZ_4K),
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.type = MT_DEVICE
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},
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/* Skip the mapping of 0xF0130000~0xF013FFFF to protect access from APMCU */
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{
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.virtual = (DEBUGTOP_BASE - SZ_4K),
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS((DEBUGTOP_BASE - SZ_4K))),
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.length = (0x30000 + SZ_4K),
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.type = MT_DEVICE
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},
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{
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.virtual = (DEBUGTOP_BASE + 0x40000),
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(DEBUGTOP_BASE + 0x40000)),
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.length = 0xC0000,
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.type = MT_DEVICE
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},
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{
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.virtual = MCUSYS_CFGREG_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(MCUSYS_CFGREG_BASE)),
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.length = SZ_2M,
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.type = MT_DEVICE
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},
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/* //// */
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{
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.virtual = AP_DMA_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(AP_DMA_BASE)),
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.length = SZ_2M + SZ_1M,
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.type = MT_DEVICE
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},
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{
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/* virtual 0xF2000000, physical 0x00200000 */
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.virtual = SYSRAM_BASE,
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.pfn = __phys_to_pfn(0x00200000),
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.length = SZ_128K,
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.type = MT_DEVICE
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},
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{
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.virtual = G3D_CONFIG_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(G3D_CONFIG_BASE)),
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.length = SZ_128K,
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.type = MT_DEVICE
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},
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{
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.virtual = DISPSYS_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(DISPSYS_BASE)),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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{
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.virtual = IMGSYS_CONFG_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(IMGSYS_CONFG_BASE)),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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{
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.virtual = VDEC_GCON_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(VDEC_GCON_BASE)),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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{
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/* virtual 0xF7000000, physical 0x08000000 */
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.virtual = DEVINFO_BASE,
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.pfn = __phys_to_pfn(0x08000000),
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.length = SZ_64K,
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.type = MT_DEVICE
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},
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{
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.virtual = CONN_BTSYS_PKV_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(CONN_BTSYS_PKV_BASE)),
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.length = SZ_1M,
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.type = MT_DEVICE
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},
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{
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/* virtual 0xF9000000, physical 0x00100000 */
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.virtual = INTER_SRAM,
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.pfn = __phys_to_pfn(0x00100000),
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.length = SZ_64K,
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.type = MT_DEVICE
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},
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#else
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{
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.virtual = INFRA_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(INFRA_BASE)),
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.length = SZ_4M,
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.type = MT_DEVICE
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},
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{
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.virtual = AP_DMA_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(AP_DMA_BASE)),
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.length = SZ_2M + SZ_1M,
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.type = MT_DEVICE
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},
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#if 0
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{
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.virtual = MMSYS1_CONFIG_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(MMSYS1_CONFIG_BASE)),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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#endif
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{
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/* From: 0xF2000000 to 0xF2020000*/
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.virtual = SYSRAM_BASE,
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.pfn = __phys_to_pfn(0x00200000),
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.length = SZ_128K,
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.type = MT_DEVICE
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},
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{
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.virtual = DISPSYS_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(DISPSYS_BASE)),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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{
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.virtual = IMGSYS_CONFG_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(IMGSYS_CONFG_BASE)),
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.length = SZ_16M,
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.type = MT_DEVICE
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},
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/* G3DSYS */
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{
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.virtual = G3D_CONFIG_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(G3D_CONFIG_BASE)),
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.length = SZ_4K,
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.type = MT_DEVICE
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},
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{
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.virtual = DEVINFO_BASE,
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.pfn = __phys_to_pfn(0x08000000),
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.length = SZ_64K,
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.type = MT_DEVICE
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},
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{
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.virtual = MALI_BASE,
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.pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(MALI_BASE)),
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.length = SZ_64K,
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.type = MT_DEVICE
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},
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{
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.virtual = INTER_SRAM,
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.pfn = __phys_to_pfn(0x00100000),
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.length = SZ_64K,
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.type = MT_DEVICE
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},
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#endif
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};
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void __init mt_map_io(void)
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{
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iotable_init(mt_io_desc, ARRAY_SIZE(mt_io_desc));
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}
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#ifdef CONFIG_MTK_TABLET_HARDWARE
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MACHINE_START(MT8127, "MT8117")
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#else
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MACHINE_START(MT8127, "MT8127")
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#endif
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.atag_offset = 0x00000100,
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.map_io = mt_map_io,
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.init_irq = mt_init_irq,
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#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
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.timer = &mt6582_timer,
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#else
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.smp = smp_ops(mt65xx_smp_ops),
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.init_time = mt6582_timer_init,
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#endif
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#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) || defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
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.init_early = mt_init_early,
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#endif
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.init_machine = mt_init,
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.fixup = mt_fixup,
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.restart = arm_machine_restart,
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.reserve = mt_reserve,
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MACHINE_END
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