ggow
200 lines
6.3 KiB
C
200 lines
6.3 KiB
C
#ifndef SD_MISC_H
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#define SD_MISC_H
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#ifdef __KERNEL__
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#include <linux/bitops.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/core.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/sd.h>
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#endif
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struct msdc_ioctl {
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int opcode;
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int host_num;
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int iswrite;
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int trans_type;
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unsigned int total_size;
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unsigned int address;
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unsigned int *buffer;
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int cmd_pu_driving;
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int cmd_pd_driving;
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int dat_pu_driving;
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int dat_pd_driving;
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int clk_pu_driving;
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int clk_pd_driving;
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int ds_pu_driving;
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int ds_pd_driving;
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int rst_pu_driving;
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int rst_pd_driving;
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int clock_freq;
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int partition;
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int hopping_bit;
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int hopping_time;
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int result;
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int sd30_mode;
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int sd30_max_current;
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int sd30_drive;
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int sd30_power_control;
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};
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/**************for msdc_ssc***********************/
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#define AUDPLL_CTL_REG12 (0xF0007070)
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#define AUDPLL_CTL_REG01 (0xF00071E0)
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#define AUDPLL_CTL_REG02 (0xF100000C)
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#define AUDPLL_TSEL_MASK (1792) /* MASK = 00000111 00000000 */
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#define AUDPLL_TSEL_RESULT1 (0) /* REG = 00000000 00000000 30.5us */
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#define AUDPLL_TSEL_RESULT2 (256) /* REG = 00000001 00000000 61.0us */
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#define AUDPLL_TSEL_RESULT3 (512) /* REG = 00000010 00000000 122.1us */
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#define AUDPLL_TSEL_RESULT4 (768) /* REG = 00000011 00000000 244.1us */
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#define AUDPLL_TSEL_RESULT5 (1024) /* REG = 00000100 00000000 448.3us */
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#define AUDPLL_BSEL_MASK (7) /* MASK = 00000000 00000111 */
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#define AUDPLL_BSEL_RESULT0 (0) /* REG = 00000000 00000000 REG init val */
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#define AUDPLL_BSEL_RESULT1 (1) /* REG = 00000000 00000001 2.26MHz */
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#define AUDPLL_BSEL_RESULT2 (2) /* REG = 00000000 00000010 4.52MHz */
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#define AUDPLL_BSEL_RESULT3 (4) /* REG = 00000000 00000100 9.04MHz */
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#define SET_HOP_BIT_NONE (0)
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#define SET_HOP_BIT1 (1)
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#define SET_HOP_BIT2 (2)
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#define SET_HOP_BIT3 (3)
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#define SET_HOP_TIME0 (0)
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#define SET_HOP_TIME1 (1)
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#define SET_HOP_TIME2 (2)
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#define SET_HOP_TIME3 (3)
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#define SET_HOP_TIME4 (4)
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/**************for msdc_ssc***********************/
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#define MSDC_DRIVING_SETTING (0)
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#define MSDC_CLOCK_FREQUENCY (1)
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#define MSDC_SINGLE_READ_WRITE (2)
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#define MSDC_MULTIPLE_READ_WRITE (3)
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#define MSDC_GET_CID (4)
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#define MSDC_GET_CSD (5)
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#define MSDC_GET_EXCSD (6)
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#define MSDC_ERASE_PARTITION (7)
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#define MSDC_HOPPING_SETTING (8)
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#define MSDC_REINIT_SDCARD _IOW('r', 9, int)
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#define MSDC_SD30_MODE_SWITCH (10)
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#define MSDC_GET_BOOTPART (11)
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#define MSDC_SET_BOOTPART (12)
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#define MSDC_GET_PARTSIZE (13)
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#define MSDC_ERASE_SELECTED_AREA (0x20)
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#define MSDC_CARD_DUNM_FUNC (0xff)
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typedef enum {
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USER_PARTITION = 0,
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BOOT_PARTITION_1,
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BOOT_PARTITION_2,
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RPMB_PARTITION,
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GP_PARTITION_1,
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GP_PARTITION_2,
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GP_PARTITION_3,
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GP_PARTITION_4,
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} PARTITON_ACCESS_T;
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typedef enum {
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SDHC_HIGHSPEED = 0, /* 0 Host supports HS mode */
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UHS_SDR12, /* 1 Host supports UHS SDR12 mode */
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UHS_SDR25, /* 2 Host supports UHS SDR25 mode */
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UHS_SDR50, /* 3 Host supports UHS SDR50 mode */
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UHS_SDR104, /* 4 Host supports UHS SDR104 mode */
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UHS_DDR50, /* 5 Host supports UHS DDR50 mode */
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} SD3_MODE;
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typedef enum {
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DRIVER_TYPE_A = 0, /* 0 Host supports Driver Type A */
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DRIVER_TYPE_B, /* 1 Host supports Driver Type B */
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DRIVER_TYPE_C, /* 2 Host supports Driver Type C */
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DRIVER_TYPE_D, /* 3 Host supports Driver Type D */
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} SD3_DRIVE;
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typedef enum {
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MAX_CURRENT_200 = 0, /* 0 Host max current limit is 200mA */
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MAX_CURRENT_400, /* 1 Host max current limit is 400mA */
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MAX_CURRENT_600, /* 2 Host max current limit is 600mA */
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MAX_CURRENT_800, /* 3 Host max current limit is 800mA */
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} SD3_MAX_CURRENT;
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typedef enum {
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SDXC_NO_POWER_CONTROL = 0, /* 0 Host not supports >150mA current at 3.3V /3.0V/1.8V */
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SDXC_POWER_CONTROL, /* 1 Host supports >150mA current at 3.3V /3.0V/1.8V */
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} SD3_POWER_CONTROL;
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typedef enum {
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DUMP_INTO_BOOT_CARD_IPANIC = 0,
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DUMP_INTO_BOOT_CARD_KDUMP = 1,
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DUMP_INTO_EXTERN_CARD = 2,
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} DUMP_STORAGE_TYPE;
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typedef enum {
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EMMC_CARD_BOOT = 0,
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SD_CARD_BOOT,
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EMMC_CARD,
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SD_CARD,
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} STORAGE_TPYE;
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#define EXT_CSD_BOOT_SIZE_MULT (226) /* R */
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#define EXT_CSD_HC_ERASE_GRP_SIZE (224) /* RO */
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#define EXT_CSD_HC_WP_GPR_SIZE (221) /* RO */
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#define EXT_CSD_RPMB_SIZE_MULT (168) /* R */
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#define EXT_CSD_GP1_SIZE_MULT (143) /* R/W 3 bytes */
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#define EXT_CSD_GP2_SIZE_MULT (146) /* R/W 3 bytes */
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#define EXT_CSD_GP3_SIZE_MULT (149) /* R/W 3 bytes */
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#define EXT_CSD_GP4_SIZE_MULT (152) /* R/W 3 bytes */
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#define EXT_CSD_PART_CFG (179) /* R/W/E & R/W/E_P */
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#define EXT_CSD_CACHE_FLUSH (32)
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#define EXT_CSD_CACHE_CTRL (33)
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#define CAPACITY_2G (2 * 1024 * 1024 * 1024ULL)
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typedef enum {
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EMMC_BOOT_NO_EN = 0,
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EMMC_BOOT1_EN,
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EMMC_BOOT2_EN,
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EMMC_BOOT_USER = 7,
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EMMC_BOOT_END
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} BOOT_PARTITION_EN;
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typedef enum {
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EMMC_PART_UNKNOWN=0
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,EMMC_PART_BOOT1
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,EMMC_PART_BOOT2
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,EMMC_PART_RPMB
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,EMMC_PART_GP1
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,EMMC_PART_GP2
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,EMMC_PART_GP3
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,EMMC_PART_GP4
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,EMMC_PART_USER
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,EMMC_PART_END
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} Region;
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typedef enum {
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CARD_INFO = 0,
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DISK_INFO,
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EMMC_USER_CAPACITY,
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EMMC_CAPACITY,
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EMMC_RESERVE,
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} GET_STORAGE_INFO;
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struct storage_info {
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struct mmc_card *card;
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struct gendisk *disk;
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unsigned long long emmc_user_capacity;
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unsigned long long emmc_capacity;
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int emmc_reserve;
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};
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int msdc_get_info(STORAGE_TPYE storage_type, GET_STORAGE_INFO info_type, struct storage_info *info);
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#endif /* end of SD_MISC_H */
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