Remove all the amazon logging hooks

Remove amazon logging function drivers
Update Fire 7 configs to remove amazon logging in next commit
2019-04-20 14:20:25 +01:00 · 2019-04-20 02:24:52 +01:00 · 2019-04-20 01:51:30 +01:00 · 2019-04-20 01:43:48 +01:00 · 2019-04-20 01:31:52 +01:00 · 2019-04-20 01:28:38 +01:00
2947 changed files with 25165 additions and 186983 deletions
@@ -1,118 +0,0 @@
-#
-# This list is used by git-shortlog to fix a few botched name translations
-# in the git archive, either because the author's full name was messed up
-# and/or not always written the same way, making contributions from the
-# same person appearing not to be so or badly displayed.
-#
-# repo-abbrev: /pub/scm/linux/kernel/git/
-#
-
-Aaron Durbin <adurbin@google.com>
-Adam Oldham <oldhamca@gmail.com>
-Adam Radford <aradford@gmail.com>
-Adrian Bunk <bunk@stusta.de>
-Alan Cox <alan@lxorguk.ukuu.org.uk>
-Alan Cox <root@hraefn.swansea.linux.org.uk>
-Aleksey Gorelov <aleksey_gorelov@phoenix.com>
-Al Viro <viro@ftp.linux.org.uk>
-Al Viro <viro@zenIV.linux.org.uk>
-Andreas Herrmann <aherrman@de.ibm.com>
-Andrew Morton <akpm@osdl.org>
-Andrew Vasquez <andrew.vasquez@qlogic.com>
-Andy Adamson <andros@citi.umich.edu>
-Archit Taneja <archit@ti.com>
-Arnaud Patard <arnaud.patard@rtp-net.org>
-Arnd Bergmann <arnd@arndb.de>
-Axel Dyks <xl@xlsigned.net>
-Axel Lin <axel.lin@gmail.com>
-Ben Gardner <bgardner@wabtec.com>
-Ben M Cahill <ben.m.cahill@intel.com>
-Björn Steinbrink <B.Steinbrink@gmx.de>
-Brian Avery <b.avery@hp.com>
-Brian King <brking@us.ibm.com>
-Christoph Hellwig <hch@lst.de>
-Corey Minyard <minyard@acm.org>
-Damian Hobson-Garcia <dhobsong@igel.co.jp>
-David Brownell <david-b@pacbell.net>
-David Woodhouse <dwmw2@shinybook.infradead.org>
-Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
-Domen Puncer <domen@coderock.org>
-Douglas Gilbert <dougg@torque.net>
-Ed L. Cashin <ecashin@coraid.com>
-Evgeniy Polyakov <johnpol@2ka.mipt.ru>
-Felipe W Damasio <felipewd@terra.com.br>
-Felix Kuhling <fxkuehl@gmx.de>
-Felix Moeller <felix@derklecks.de>
-Filipe Lautert <filipe@icewall.org>
-Franck Bui-Huu <vagabon.xyz@gmail.com>
-Frank Zago <fzago@systemfabricworks.com>
-Greg Kroah-Hartman <greg@echidna.(none)>
-Greg Kroah-Hartman <gregkh@suse.de>
-Greg Kroah-Hartman <greg@kroah.com>
-Henk Vergonet <Henk.Vergonet@gmail.com>
-Henrik Kretzschmar <henne@nachtwindheim.de>
-Herbert Xu <herbert@gondor.apana.org.au>
-Jacob Shin <Jacob.Shin@amd.com>
-James Bottomley <jejb@mulgrave.(none)>
-James Bottomley <jejb@titanic.il.steeleye.com>
-James E Wilson <wilson@specifix.com>
-James Ketrenos <jketreno@io.(none)>
-Jean Tourrilhes <jt@hpl.hp.com>
-Jeff Garzik <jgarzik@pretzel.yyz.us>
-Jens Axboe <axboe@suse.de>
-Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
-John Stultz <johnstul@us.ibm.com>
-Juha Yrjola <at solidboot.com>
-Juha Yrjola <juha.yrjola@nokia.com>
-Juha Yrjola <juha.yrjola@solidboot.com>
-Kay Sievers <kay.sievers@vrfy.org>
-Kenneth W Chen <kenneth.w.chen@intel.com>
-Koushik <raghavendra.koushik@neterion.com>
-Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
-Leonid I Ananiev <leonid.i.ananiev@intel.com>
-Linas Vepstas <linas@austin.ibm.com>
-Mark Brown <broonie@sirena.org.uk>
-Matthieu CASTET <castet.matthieu@free.fr>
-Mayuresh Janorkar <mayur@ti.com>
-Michael Buesch <m@bues.ch>
-Michel Dänzer <michel@tungstengraphics.com>
-Mitesh shah <mshah@teja.com>
-Morten Welinder <terra@gnome.org>
-Morten Welinder <welinder@anemone.rentec.com>
-Morten Welinder <welinder@darter.rentec.com>
-Morten Welinder <welinder@troll.com>
-Mythri P K <mythripk@ti.com>
-Nguyen Anh Quynh <aquynh@gmail.com>
-Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it>
-Patrick Mochel <mochel@digitalimplant.org>
-Peter A Jonsson <pj@ludd.ltu.se>
-Peter Oruba <peter@oruba.de>
-Peter Oruba <peter.oruba@amd.com>
-Praveen BP <praveenbp@ti.com>
-Rajesh Shah <rajesh.shah@intel.com>
-Ralf Baechle <ralf@linux-mips.org>
-Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
-Rémi Denis-Courmont <rdenis@simphalempin.com>
-Rudolf Marek <R.Marek@sh.cvut.cz>
-Rui Saraiva <rmps@joel.ist.utl.pt>
-Sachin P Sant <ssant@in.ibm.com>
-Sam Ravnborg <sam@mars.ravnborg.org>
-Sascha Hauer <s.hauer@pengutronix.de>
-S.Çağlar Onur <caglar@pardus.org.tr>
-Simon Kelley <simon@thekelleys.org.uk>
-Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
-Stephen Hemminger <shemminger@osdl.org>
-Sumit Semwal <sumit.semwal@ti.com>
-Tejun Heo <htejun@gmail.com>
-Thomas Graf <tgraf@suug.ch>
-Tony Luck <tony.luck@intel.com>
-Tsuneo Yoshioka <Tsuneo.Yoshioka@f-secure.com>
-Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de>
-Uwe Kleine-König <ukl@pengutronix.de>
-Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com>
-Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
-Viresh Kumar <viresh.linux@gmail.com> <viresh.kumar@st.com>
-Takashi YOSHII <takashi.yoshii.zj@renesas.com>
-Yusuke Goda <goda.yusuke@renesas.com>
-Gustavo Padovan <gustavo@las.ic.unicamp.br>
-Gustavo Padovan <padovan@profusion.mobi>
@@ -1,7 +0,0 @@
-filesystems/dnotify_test
-laptops/dslm
-timers/hpet_example
-vm/hugepage-mmap
-vm/hugepage-shm
-vm/map_hugetlb
-
@@ -1,13 +0,0 @@
-*.xml
-*.ps
-*.html
-*.9.gz
-*.9
-*.aux
-*.dvi
-*.log
-*.out
-*.png
-*.gif
-media-indices.tmpl
-media-entities.tmpl
@@ -1 +0,0 @@
-!*.xml
@@ -1 +0,0 @@
-!*.xml
@@ -1 +0,0 @@
-getdelays
@@ -1 +0,0 @@
-cfag12864b-example
@@ -1 +0,0 @@
-ucon
@@ -77,7 +77,7 @@ Examples:
 clks: ccm@53f80000{
 	compatible = "fsl,imx31-ccm";
 	reg = <0x53f80000 0x4000>;
-	interrupts = <31>, <53>;
+	interrupts = <0 31 0x04 0 53 0x04>;
 	#clock-cells = <1>;
 };

@@ -38,7 +38,7 @@ dma_apbx: dma-apbx@80024000 {
 		      80 81 68 69
 		      70 71 72 73
 		      74 75 76 77>;
-	interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
+	interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
 			  "saif0", "saif1", "i2c0", "i2c1",
 			  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
 			  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
@@ -91,5 +91,5 @@ mpp61         61       gpo, dev(wen1), uart1(txd), audio(rclk)
 mpp62         62       gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
                       audio(mclk), uart0(cts)
 mpp63         63       gpo, spi0(sck), tclk
-mpp64         64       gpio, spi0(miso), spi0(cs1)
-mpp65         65       gpio, spi0(mosi), spi0(cs2)
+mpp64         64       gpio, spi0(miso), spi0-1(cs1)
+mpp65         65       gpio, spi0(mosi), spi0-1(cs2)
@@ -41,15 +41,15 @@ mpp20         20       gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk)
 mpp21         21       gpio, ge0(rxd5), ge1(rxd3), lcd(d21), mem(bat)
 mpp22         22       gpio, ge0(rxd6), ge1(rxctl), lcd(d22), sata0(prsnt)
 mpp23         23       gpio, ge0(rxd7), ge1(rxclk), lcd(d23), sata1(prsnt)
-mpp24         24       gpio, lcd(hsync), sata1(prsnt), tdm(rst)
-mpp25         25       gpio, lcd(vsync), sata0(prsnt), tdm(pclk)
-mpp26         26       gpio, lcd(clk), tdm(fsync)
+mpp24         24       gpio, lcd(hsync), sata1(prsnt), nf(bootcs-re), tdm(rst)
+mpp25         25       gpio, lcd(vsync), sata0(prsnt), nf(bootcs-we), tdm(pclk)
+mpp26         26       gpio, lcd(clk), tdm(fsync), vdd(cpu1-pd)
 mpp27         27       gpio, lcd(e), tdm(dtx), ptp(trig)
 mpp28         28       gpio, lcd(pwm), tdm(drx), ptp(evreq)
-mpp29         29       gpio, lcd(ref-clk), tdm(int0), ptp(clk)
+mpp29         29       gpio, lcd(ref-clk), tdm(int0), ptp(clk), vdd(cpu0-pd)
 mpp30         30       gpio, tdm(int1), sd0(clk)
-mpp31         31       gpio, tdm(int2), sd0(cmd)
-mpp32         32       gpio, tdm(int3), sd0(d0)
+mpp31         31       gpio, tdm(int2), sd0(cmd), vdd(cpu0-pd)
+mpp32         32       gpio, tdm(int3), sd0(d0), vdd(cpu1-pd)
 mpp33         33       gpio, tdm(int4), sd0(d1), mem(bat)
 mpp34         34       gpio, tdm(int5), sd0(d2), sata0(prsnt)
 mpp35         35       gpio, tdm(int6), sd0(d3), sata1(prsnt)
@@ -57,18 +57,21 @@ mpp36         36       gpio, spi(mosi)
 mpp37         37       gpio, spi(miso)
 mpp38         38       gpio, spi(sck)
 mpp39         39       gpio, spi(cs0)
-mpp40         40       gpio, spi(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0)
+mpp40         40       gpio, spi(cs1), uart2(cts), lcd(vga-hsync), vdd(cpu1-pd),
+                       pcie(clkreq0)
 mpp41         41       gpio, spi(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt),
                       pcie(clkreq1)
-mpp42         42       gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer)
-mpp43         43       gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout)
+mpp42         42       gpio, uart2(rxd), uart0(cts), tdm(int7), tdm-1(timer),
+                       vdd(cpu0-pd)
+mpp43         43       gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout),
+                       vdd(cpu2-3-pd){1}
 mpp44         44       gpio, uart2(cts), uart3(rxd), spi(cs4), pcie(clkreq2),
                       mem(bat)
 mpp45         45       gpio, uart2(rts), uart3(txd), spi(cs5), sata1(prsnt)
 mpp46         46       gpio, uart3(rts), uart1(rts), spi(cs6), sata0(prsnt)
 mpp47         47       gpio, uart3(cts), uart1(cts), spi(cs7), pcie(clkreq3),
                       ref(clkout)
-mpp48         48       gpio, dev(clkout), dev(burst/last)
+mpp48         48       gpio, tclk, dev(burst/last)

 * Marvell Armada XP (mv78260 and mv78460 only)

@@ -80,9 +83,9 @@ mpp51         51       gpio, dev(ad16)
 mpp52         52       gpio, dev(ad17)
 mpp53         53       gpio, dev(ad18)
 mpp54         54       gpio, dev(ad19)
-mpp55         55       gpio, dev(ad20)
-mpp56         56       gpio, dev(ad21)
-mpp57         57       gpio, dev(ad22)
+mpp55         55       gpio, dev(ad20), vdd(cpu0-pd)
+mpp56         56       gpio, dev(ad21), vdd(cpu1-pd)
+mpp57         57       gpio, dev(ad22), vdd(cpu2-3-pd){1}
 mpp58         58       gpio, dev(ad23)
 mpp59         59       gpio, dev(ad24)
 mpp60         60       gpio, dev(ad25)
@@ -92,3 +95,6 @@ mpp63         63       gpio, dev(ad28)
 mpp64         64       gpio, dev(ad29)
 mpp65         65       gpio, dev(ad30)
 mpp66         66       gpio, dev(ad31)
+
+Notes:
+* {1} vdd(cpu2-3-pd) only available on mv78460.
@@ -4,9 +4,9 @@ Required properties:
 - compatible : "arm,pl022", "arm,primecell"
 - reg : Offset and length of the register set for the device
 - interrupts : Should contain SPI controller interrupt
- num-cs : total number of chipselects

 Optional properties:
+- num-cs : total number of chipselects
 - cs-gpios : should specify GPIOs used for chipselects.
  The gpios will be referred to as reg = <index> in the SPI child nodes.
  If unspecified, a single SPI device without a chip select can be used.
@@ -14,10 +14,3 @@ filesystem.
 efivarfs is typically mounted like this,

 	mount -t efivarfs none /sys/firmware/efi/efivars
-
-Due to the presence of numerous firmware bugs where removing non-standard
-UEFI variables causes the system firmware to fail to POST, efivarfs
-files that are not well-known standardized variables are created
-as immutable files.  This doesn't prevent removal - "chattr -i" will work -
-but it does prevent this kind of failure from being accomplished
-accidentally.
@@ -445,6 +445,3 @@ object doesn't exist.  It's remote/distributed ones that might care...
 [mandatory]
 	FS_REVAL_DOT is gone; if you used to have it, add ->d_weak_revalidate()
 in your dentry operations instead.
--
-[mandatory]
-	vfs_readdir() is gone; switch to iterate_dir() instead
@@ -417,6 +417,7 @@ Private_Dirty:         0 kB
 Referenced:          892 kB
 Anonymous:             0 kB
 Swap:                  0 kB
+SwapPss:               0 kB
 KernelPageSize:        4 kB
 MMUPageSize:           4 kB
 Locked:              374 kB
@@ -427,16 +428,23 @@ the first of these lines shows the same information as is displayed for the
 mapping in /proc/PID/maps.  The remaining lines show the size of the mapping
 (size), the amount of the mapping that is currently resident in RAM (RSS), the
 process' proportional share of this mapping (PSS), the number of clean and
-dirty private pages in the mapping.  Note that even a page which is part of a
-MAP_SHARED mapping, but has only a single pte mapped, i.e.  is currently used
-by only one process, is accounted as private and not as shared.  "Referenced"
-indicates the amount of memory currently marked as referenced or accessed.
+dirty private pages in the mapping.
+
+The "proportional set size" (PSS) of a process is the count of pages it has
+in memory, where each page is divided by the number of processes sharing it.
+So if a process has 1000 pages all to itself, and 1000 shared with one other
+process, its PSS will be 1500.
+Note that even a page which is part of a MAP_SHARED mapping, but has only
+a single pte mapped, i.e.  is currently used by only one process, is accounted
+as private and not as shared.
+"Referenced" indicates the amount of memory currently marked as referenced or
+accessed.
 "Anonymous" shows the amount of memory that does not belong to any file.  Even
 a mapping associated with a file may contain anonymous pages: when MAP_PRIVATE
 and a page is modified, the file page is replaced by a private anonymous copy.
 "Swap" shows how much would-be-anonymous memory is also used, but out on
 swap.
-
+"SwapPss" shows proportional swap share of this mapping.
 "VmFlags" field deserves a separate description. This member represents the kernel
 flags associated with the particular virtual memory area in two letter encoded
 manner. The codes are the following:
@@ -767,6 +775,7 @@ The "Locked" indicates whether the mapping is locked in memory or not.

 MemTotal:     16344972 kB
 MemFree:      13634064 kB
+MemAvailable: 14836172 kB
 Buffers:          3656 kB
 Cached:        1195708 kB
 SwapCached:          0 kB
@@ -799,6 +808,14 @@ AnonHugePages:   49152 kB
    MemTotal: Total usable ram (i.e. physical ram minus a few reserved
              bits and the kernel binary code)
     MemFree: The sum of LowFree+HighFree
+MemAvailable: An estimate of how much memory is available for starting new
+              applications, without swapping. Calculated from MemFree,
+              SReclaimable, the size of the file LRU lists, and the low
+              watermarks in each zone.
+              The estimate takes into account that the system needs some
+              page cache to function well, and that not all reclaimable
+              slab will be reclaimable, due to items being in use. The
+              impact of those factors will vary from system to system.
     Buffers: Relatively temporary storage for raw disk blocks
              shouldn't get tremendously large (20MB or so)
      Cached: in-memory cache for files read from the disk (the
@@ -1 +0,0 @@
-aliasing-test
@@ -955,10 +955,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 			When zero, profiling data is discarded and associated
 			debugfs files are removed at module unload time.

-	goldfish	[X86] Enable the goldfish android emulator platform.
-			Don't use this when you are not running on the
-			android emulator
-
 	gpt		[EFI] Forces disk with valid GPT signature but
 			invalid Protective MBR to be treated as GPT.

@@ -1065,7 +1061,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 	i8042.notimeout	[HW] Ignore timeout condition signalled by controller
 	i8042.reset	[HW] Reset the controller during init and cleanup
 	i8042.unlock	[HW] Unlock (ignore) the keylock
-	i8042.kbdreset  [HW] Reset device connected to KBD port

 	i810=		[HW,DRM]

@@ -2889,13 +2884,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
 	spia_pedr=
 	spia_peddr=

-	stack_guard_gap=	[MM]
-			override the default stack gap protection. The value
-			is in page units and it defines how many pages prior
-			to (for stacks growing down) resp. after (for stacks
-			growing up) the main stack are reserved for no other
-			mapping. Default value is 256 pages.
-
 	stacktrace	[FTRACE]
 			Enabled the stack tracer on boot up.

@@ -1,164 +0,0 @@
-
-LZO stream format as understood by Linux's LZO decompressor
-===========================================================
-
-Introduction
-
-  This is not a specification. No specification seems to be publicly available
-  for the LZO stream format. This document describes what input format the LZO
-  decompressor as implemented in the Linux kernel understands. The file subject
-  of this analysis is lib/lzo/lzo1x_decompress_safe.c. No analysis was made on
-  the compressor nor on any other implementations though it seems likely that
-  the format matches the standard one. The purpose of this document is to
-  better understand what the code does in order to propose more efficient fixes
-  for future bug reports.
-
-Description
-
-  The stream is composed of a series of instructions, operands, and data. The
-  instructions consist in a few bits representing an opcode, and bits forming
-  the operands for the instruction, whose size and position depend on the
-  opcode and on the number of literals copied by previous instruction. The
-  operands are used to indicate :
-
-    - a distance when copying data from the dictionary (past output buffer)
-    - a length (number of bytes to copy from dictionary)
-    - the number of literals to copy, which is retained in variable "state"
-      as a piece of information for next instructions.
-
-  Optionally depending on the opcode and operands, extra data may follow. These
-  extra data can be a complement for the operand (eg: a length or a distance
-  encoded on larger values), or a literal to be copied to the output buffer.
-
-  The first byte of the block follows a different encoding from other bytes, it
-  seems to be optimized for literal use only, since there is no dictionary yet
-  prior to that byte.
-
-  Lengths are always encoded on a variable size starting with a small number
-  of bits in the operand. If the number of bits isn't enough to represent the
-  length, up to 255 may be added in increments by consuming more bytes with a
-  rate of at most 255 per extra byte (thus the compression ratio cannot exceed
-  around 255:1). The variable length encoding using #bits is always the same :
-
-       length = byte & ((1 << #bits) - 1)
-       if (!length) {
-               length = ((1 << #bits) - 1)
-               length += 255*(number of zero bytes)
-               length += first-non-zero-byte
-       }
-       length += constant (generally 2 or 3)
-
-  For references to the dictionary, distances are relative to the output
-  pointer. Distances are encoded using very few bits belonging to certain
-  ranges, resulting in multiple copy instructions using different encodings.
-  Certain encodings involve one extra byte, others involve two extra bytes
-  forming a little-endian 16-bit quantity (marked LE16 below).
-
-  After any instruction except the large literal copy, 0, 1, 2 or 3 literals
-  are copied before starting the next instruction. The number of literals that
-  were copied may change the meaning and behaviour of the next instruction. In
-  practice, only one instruction needs to know whether 0, less than 4, or more
-  literals were copied. This is the information stored in the <state> variable
-  in this implementation. This number of immediate literals to be copied is
-  generally encoded in the last two bits of the instruction but may also be
-  taken from the last two bits of an extra operand (eg: distance).
-
-  End of stream is declared when a block copy of distance 0 is seen. Only one
-  instruction may encode this distance (0001HLLL), it takes one LE16 operand
-  for the distance, thus requiring 3 bytes.
-
-  IMPORTANT NOTE : in the code some length checks are missing because certain
-  instructions are called under the assumption that a certain number of bytes
-  follow because it has already been garanteed before parsing the instructions.
-  They just have to "refill" this credit if they consume extra bytes. This is
-  an implementation design choice independant on the algorithm or encoding.
-
-Byte sequences
-
-  First byte encoding :
-
-      0..17   : follow regular instruction encoding, see below. It is worth
-                noting that codes 16 and 17 will represent a block copy from
-                the dictionary which is empty, and that they will always be
-                invalid at this place.
-
-      18..21  : copy 0..3 literals
-                state = (byte - 17) = 0..3  [ copy <state> literals ]
-                skip byte
-
-      22..255 : copy literal string
-                length = (byte - 17) = 4..238
-                state = 4 [ don't copy extra literals ]
-                skip byte
-
-  Instruction encoding :
-
-      0 0 0 0 X X X X  (0..15)
-        Depends on the number of literals copied by the last instruction.
-        If last instruction did not copy any literal (state == 0), this
-        encoding will be a copy of 4 or more literal, and must be interpreted
-        like this :
-
-           0 0 0 0 L L L L  (0..15)  : copy long literal string
-           length = 3 + (L ?: 15 + (zero_bytes * 255) + non_zero_byte)
-           state = 4  (no extra literals are copied)
-
-        If last instruction used to copy between 1 to 3 literals (encoded in
-        the instruction's opcode or distance), the instruction is a copy of a
-        2-byte block from the dictionary within a 1kB distance. It is worth
-        noting that this instruction provides little savings since it uses 2
-        bytes to encode a copy of 2 other bytes but it encodes the number of
-        following literals for free. It must be interpreted like this :
-
-           0 0 0 0 D D S S  (0..15)  : copy 2 bytes from <= 1kB distance
-           length = 2
-           state = S (copy S literals after this block)
-         Always followed by exactly one byte : H H H H H H H H
-           distance = (H << 2) + D + 1
-
-        If last instruction used to copy 4 or more literals (as detected by
-        state == 4), the instruction becomes a copy of a 3-byte block from the
-        dictionary from a 2..3kB distance, and must be interpreted like this :
-
-           0 0 0 0 D D S S  (0..15)  : copy 3 bytes from 2..3 kB distance
-           length = 3
-           state = S (copy S literals after this block)
-         Always followed by exactly one byte : H H H H H H H H
-           distance = (H << 2) + D + 2049
-
-      0 0 0 1 H L L L  (16..31)
-           Copy of a block within 16..48kB distance (preferably less than 10B)
-           length = 2 + (L ?: 7 + (zero_bytes * 255) + non_zero_byte)
-        Always followed by exactly one LE16 :  D D D D D D D D : D D D D D D S S
-           distance = 16384 + (H << 14) + D
-           state = S (copy S literals after this block)
-           End of stream is reached if distance == 16384
-
-      0 0 1 L L L L L  (32..63)
-           Copy of small block within 16kB distance (preferably less than 34B)
-           length = 2 + (L ?: 31 + (zero_bytes * 255) + non_zero_byte)
-        Always followed by exactly one LE16 :  D D D D D D D D : D D D D D D S S
-           distance = D + 1
-           state = S (copy S literals after this block)
-
-      0 1 L D D D S S  (64..127)
-           Copy 3-4 bytes from block within 2kB distance
-           state = S (copy S literals after this block)
-           length = 3 + L
-         Always followed by exactly one byte : H H H H H H H H
-           distance = (H << 3) + D + 1
-
-      1 L L D D D S S  (128..255)
-           Copy 5-8 bytes from block within 2kB distance
-           state = S (copy S literals after this block)
-           length = 5 + L
-         Always followed by exactly one byte : H H H H H H H H
-           distance = (H << 3) + D + 1
-
-Authors
-
-  This document was written by Willy Tarreau <w@1wt.eu> on 2014/07/19 during an
-  analysis of the decompression code available in Linux 3.16-rc5. The code is
-  tricky, it is possible that this document contains mistakes or that a few
-  corner cases were overlooked. In any case, please report any doubt, fix, or
-  proposed updates to the author(s) so that the document can be updated.
@@ -1 +0,0 @@
-mei-amt-version
@@ -1 +0,0 @@
-ifenslave
@@ -1 +0,0 @@
-timestamping
@@ -1 +0,0 @@
-crc32hash
@@ -14,19 +14,11 @@ survive after a restart.

 1. Ramoops concepts

-Ramoops uses a predefined memory area to store the dump. The start and size
-and type of the memory area are set using three variables:
+Ramoops uses a predefined memory area to store the dump. The start and size of
+the memory area are set using two variables:
  * "mem_address" for the start
  * "mem_size" for the size. The memory size will be rounded down to a
  power of two.
-  * "mem_type" to specifiy if the memory type (default is pgprot_writecombine).
-
-Typically the default value of mem_type=0 should be used as that sets the pstore
-mapping to pgprot_writecombine. Setting mem_type=1 attempts to use
-pgprot_noncached, which only works on some platforms. This is because pstore
-depends on atomic operations. At least on ARM, pgprot_noncached causes the
-memory to be mapped strongly ordered, and atomic operations on strongly ordered
-memory are implementation defined, and won't work on many ARMs such as omaps.

 The memory area is divided into "record_size" chunks (also rounded down to
 power of two) and each oops/panic writes a "record_size" chunk of
@@ -63,7 +55,6 @@ Setting the ramoops parameters can be done in 2 different manners:
 static struct ramoops_platform_data ramoops_data = {
        .mem_size               = <...>,
        .mem_address            = <...>,
-        .mem_type               = <...>,
        .record_size            = <...>,
        .dump_oops              = <...>,
        .ecc                    = <...>,
@@ -255,23 +255,19 @@ scmd->allowed.

 3. scmd recovered
    ACTION: scsi_eh_finish_cmd() is invoked to EH-finish scmd
+	- shost->host_failed--
 	- clear scmd->eh_eflags
 	- scsi_setup_cmd_retry()
 	- move from local eh_work_q to local eh_done_q
    LOCKING: none
-    CONCURRENCY: at most one thread per separate eh_work_q to
-		 keep queue manipulation lockless

 4. EH completes
    ACTION: scsi_eh_flush_done_q() retries scmds or notifies upper
-	    layer of failure. May be called concurrently but must have
-	    a no more than one thread per separate eh_work_q to
-	    manipulate the queue locklessly
+	    layer of failure.
 	- scmd is removed from eh_done_q and scmd->eh_entry is cleared
 	- if retry is necessary, scmd is requeued using
          scsi_queue_insert()
 	- otherwise, scsi_finish_command() is invoked for scmd
-	- zero shost->host_failed
    LOCKING: queue or finish function performs appropriate locking


@@ -1,2 +0,0 @@
-spidev_fdx
-spidev_test
@@ -32,8 +32,6 @@ Currently, these files are in /proc/sys/fs:
 - nr_open
 - overflowuid
 - overflowgid
- pipe-user-pages-hard
- pipe-user-pages-soft
 - protected_hardlinks
 - protected_symlinks
 - suid_dumpable
@@ -161,27 +159,6 @@ The default is 65534.

 ==============================================================

-pipe-user-pages-hard:
-
-Maximum total number of pages a non-privileged user may allocate for pipes.
-Once this limit is reached, no new pipes may be allocated until usage goes
-below the limit again. When set to 0, no limit is applied, which is the default
-setting.
-
-==============================================================
-
-pipe-user-pages-soft:
-
-Maximum total number of pages a non-privileged user may allocate for pipes
-before the pipe size gets limited to a single page. Once this limit is reached,
-new pipes will be limited to a single page in size for this user in order to
-limit total memory usage, and trying to increase them using fcntl() will be
-denied until usage goes below the limit again. The default value allows to
-allocate up to 1024 pipes at their default size. When set to 0, no limit is
-applied.
-
-==============================================================
-
 protected_hardlinks:

 A long-standing class of security issues is the hardlink-based
@@ -50,7 +50,7 @@ show up in /proc/sys/kernel:
 - panic
 - panic_on_oops
 - panic_on_unrecovered_nmi
- panic_on_stackoverflow
+- perf_event_paranoid
 - pid_max
 - powersave-nap               [ PPC only ]
 - printk
@@ -402,19 +402,6 @@ the recommended setting is 60.

 ==============================================================

-panic_on_unrecovered_nmi:
-
-The default Linux behaviour on an NMI of either memory or unknown is
-to continue operation. For many environments such as scientific
-computing it is preferable that the box is taken out and the error
-dealt with than an uncorrected parity/ECC error get propagated.
-
-A small number of systems do generate NMI's for bizarre random reasons
-such as power management so the default is off. That sysctl works like
-the existing panic controls already in that directory.
-
-==============================================================
-
 panic_on_oops:

 Controls the kernel's behaviour when an oops or BUG is encountered.
@@ -464,6 +451,30 @@ allowed to execute.

 ==============================================================

+panic_on_unrecovered_nmi:
+
+The default Linux behaviour on an NMI of either memory or unknown is
+to continue operation. For many environments such as scientific
+computing it is preferable that the box is taken out and the error
+dealt with than an uncorrected parity/ECC error get propagated.
+
+A small number of systems do generate NMI's for bizarre random reasons
+such as power management so the default is off. That sysctl works like
+the existing panic controls already in that directory.
+
+==============================================================
+
+perf_event_paranoid:
+
+Controls use of the performance events system by unprivileged
+users (without CAP_SYS_ADMIN).  The default value is 1.
+
+ -1: Allow use of (almost) all events by all users
+>=0: Disallow raw tracepoint access by users without CAP_IOC_LOCK
+>=1: Disallow CPU event access by users without CAP_SYS_ADMIN
+>=2: Disallow kernel profiling by users without CAP_SYS_ADMIN
+
+==============================================================

 pid_max:

@@ -1 +0,0 @@
-v4lgrab
@@ -1,2 +0,0 @@
-page-types
-slabinfo
@@ -1,2 +0,0 @@
-watchdog-simple
-watchdog-test
@@ -1,4 +1,4 @@
-Chinese translated version of Documentation/HOWTO
+Chinese translated version of Documentation/HOWTO

 If you have any comment or update to the content, please contact the
 original document maintainer directly.  However, if you have a problem
@@ -1,4 +1,4 @@
-Chinese translated version of Documentation/SubmittingDrivers
+Chinese translated version of Documentation/SubmittingDrivers

 If you have any comment or update to the content, please contact the
 original document maintainer directly.  However, if you have a problem
@@ -1,4 +1,4 @@
-Chinese translated version of Documentation/email-clients.txt
+Chinese translated version of Documentation/email-clients.txt

 If you have any comment or update to the content, please contact the
 original document maintainer directly.  However, if you have a problem
@@ -1,4 +1,4 @@
-Chinese translated version of Documentation/sparse.txt
+Chinese translated version of Documentation/sparse.txt

 If you have any comment or update to the content, please contact the
 original document maintainer directly.  However, if you have a problem
@@ -3032,8 +3032,8 @@ F:	Documentation/x86/efi-stub.txt
 F:	arch/ia64/kernel/efi.c
 F:	arch/x86/boot/compressed/eboot.[ch]
 F:	arch/x86/include/asm/efi.h
-F:	arch/x86/platform/efi/
-F:	drivers/firmware/efi/
+F:	arch/x86/platform/efi/*
+F:	drivers/firmware/efi/*
 F:	include/linux/efi*.h

 EFI VARIABLE FILESYSTEM
@@ -1,8 +1,8 @@
 VERSION = 3
 PATCHLEVEL = 10
-SUBLEVEL = 108
+SUBLEVEL = 54
 EXTRAVERSION =
-NAME = END-OF-LIFE
+NAME = TOSSUG Baby Fish

 # *DOCUMENTATION*
 # To see a list of typical targets execute "make help"
@@ -383,6 +383,13 @@ KBUILD_AFLAGS_MODULE  := -DMODULE
 KBUILD_CFLAGS_MODULE  := -DMODULE
 KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds

+-include $(srctree)/$(MTK_PROJECT)_mtk_cust.mak
+#MTK_INC += -I$(MTK_ROOT_CUSTOM)/$(MTK_PROJECT)/common
+LINUXINCLUDE    += $(MTK_INC)
+KBUILD_CFLAGS   += $(MTK_CFLAGS) $(MTK_CDEFS) -fno-pic
+KBUILD_CPPFLAGS += $(MTK_CPPFLAGS) $(MTK_CPPDEFS)
+KBUILD_AFLAGS   += $(MTK_AFLAGS) $(MTK_ADEFS)
+
 # Read KERNELRELEASE from include/config/kernel.release (if it exists)
 KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
 KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
@@ -989,6 +996,29 @@ _modinst_post: _modinst_
 	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modinst
 	$(call cmd,depmod)

+# MTK {
+# Target to install android modules
+
+AMODLIB = $(INSTALL_MOD_PATH)/lib/modules
+export AMODLIB
+AMODSYMLIB = $(INSTALL_MOD_PATH)/../symbols/system/lib/modules
+export AMODSYMLIB
+
+PHONY += android_modules_install
+android_modules_install: _android_modinst_
+
+PHONY += _android_modinst_
+_android_modinst_:
+	@if [ ! -d $(AMODLIB) ]; then \
+		mkdir -p $(AMODLIB); \
+	fi
+	@if [ ! -d $(AMODSYMLIB) ]; then \
+		mkdir -p $(AMODSYMLIB); \
+	fi
+	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.android.modinst
+# MTK }
+
+
 ifeq ($(CONFIG_MODULE_SIG), y)
 PHONY += modules_sign
 modules_sign:
@@ -129,6 +129,12 @@ CONFIG_PREEMPT=y
 CONFIG_RESOURCE_COUNTERS=y
 CONFIG_RTC_CLASS=y
 CONFIG_RT_GROUP_SCHED=y
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_SECURITY_PERF_EVENTS_RESTRICT=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SND=y
+CONFIG_SOUND=y
 CONFIG_STAGING=y
 CONFIG_SWITCH=y
 CONFIG_SYNC=y
@@ -1,2 +0,0 @@
-i386
-x86_64
@@ -371,6 +371,14 @@ __copy_tofrom_user_nocheck(void *to, const void *from, long len)
 	return __cu_len;
 }

+extern inline long
+__copy_tofrom_user(void *to, const void *from, long len, const void __user *validate)
+{
+	if (__access_ok((unsigned long)validate, len, get_fs()))
+		len = __copy_tofrom_user_nocheck(to, from, len);
+	return len;
+}
+
 #define __copy_to_user(to,from,n)					\
 ({									\
 	__chk_user_ptr(to);						\
@@ -385,22 +393,17 @@ __copy_tofrom_user_nocheck(void *to, const void *from, long len)
 #define __copy_to_user_inatomic __copy_to_user
 #define __copy_from_user_inatomic __copy_from_user

+
 extern inline long
 copy_to_user(void __user *to, const void *from, long n)
 {
-	if (likely(__access_ok((unsigned long)to, n, get_fs())))
-		n = __copy_tofrom_user_nocheck((__force void *)to, from, n);
-	return n;
+	return __copy_tofrom_user((__force void *)to, from, n, to);
 }

 extern inline long
 copy_from_user(void *to, const void __user *from, long n)
 {
-	if (likely(__access_ok((unsigned long)from, n, get_fs())))
-		n = __copy_tofrom_user_nocheck(to, (__force void *)from, n);
-	else
-		memset(to, 0, n);
-	return n;
+	return __copy_tofrom_user(to, (__force void *)from, n, from);
 }

 extern void __do_clear_user(void);
@@ -1 +0,0 @@
-vmlinux.lds
@@ -96,7 +96,6 @@ struct osf_dirent {
 };

 struct osf_dirent_callback {
-	struct dir_context ctx;
 	struct osf_dirent __user *dirent;
 	long __user *basep;
 	unsigned int count;
@@ -156,9 +155,8 @@ SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd,
 	buf.basep = basep;
 	buf.count = count;
 	buf.error = 0;
-	buf.ctx.actor = osf_filldir;

-	error = iterate_dir(arg.file, &buf.ctx);
+	error = vfs_readdir(arg.file, osf_filldir, &buf);
 	if (error >= 0)
 		error = buf.error;
 	if (count != buf.count)
@@ -89,7 +89,8 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
 	const struct exception_table_entry *fixup;
 	int fault, si_code = SEGV_MAPERR;
 	siginfo_t info;
-	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
+	unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+			      (cause > 0 ? FAULT_FLAG_WRITE : 0));

 	/* As of EV6, a load into $31/$f31 is a prefetch, and never faults
 	   (or is suppressed by the PALcode).  Support that for older CPUs
@@ -114,8 +115,7 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
 	if (address >= TASK_SIZE)
 		goto vmalloc_fault;
 #endif
-	if (user_mode(regs))
-		flags |= FAULT_FLAG_USER;
+
 retry:
 	down_read(&mm->mmap_sem);
 	vma = find_vma(mm, address);
@@ -142,7 +142,6 @@ retry:
 	} else {
 		if (!(vma->vm_flags & VM_WRITE))
 			goto bad_area;
-		flags |= FAULT_FLAG_WRITE;
 	}

 	/* If for any reason at all we couldn't handle the fault,
@@ -156,8 +155,6 @@ retry:
 	if (unlikely(fault & VM_FAULT_ERROR)) {
 		if (fault & VM_FAULT_OOM)
 			goto out_of_memory;
-		else if (fault & VM_FAULT_SIGSEGV)
-			goto bad_area;
 		else if (fault & VM_FAULT_SIGBUS)
 			goto do_sigbus;
 		BUG();
@@ -20,7 +20,7 @@
 		/* this is for console on PGU */
 		/* bootargs = "console=tty0 consoleblank=0"; */
 		/* this is for console on serial */
-		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug";
+		bootargs = "earlycon=uart8250,mmio32,0xc0000000,115200n8 console=ttyS0,115200n8 consoleblank=0 debug";
 	};

 	aliases {
@@ -46,9 +46,9 @@
 			#interrupt-cells = <1>;
 		};

-		uart0: serial@f0000000 {
+		uart0: serial@c0000000 {
 			compatible = "ns8250";
-			reg = <0xf0000000 0x2000>;
+			reg = <0xc0000000 0x2000>;
 			interrupts = <11>;
 			clock-frequency = <3686400>;
 			baud = <115200>;
@@ -57,21 +57,21 @@
 			no-loopback-test = <1>;
 		};

-		pgu0: pgu@f9000000 {
+		pgu0: pgu@c9000000 {
 			compatible = "snps,arcpgufb";
-			reg = <0xf9000000 0x400>;
+			reg = <0xc9000000 0x400>;
 		};

-		ps2: ps2@f9001000 {
+		ps2: ps2@c9001000 {
 			compatible = "snps,arc_ps2";
-			reg = <0xf9000400 0x14>;
+			reg = <0xc9000400 0x14>;
 			interrupts = <13>;
 			interrupt-names = "arc_ps2_irq";
 		};

-		eth0: ethernet@f0003000 {
+		eth0: ethernet@c0003000 {
 			compatible = "snps,oscilan";
-			reg = <0xf0003000 0x44>;
+			reg = <0xc0003000 0x44>;
 			interrupts = <7>, <8>;
 			interrupt-names = "rx", "tx";
 		};
@@ -25,11 +25,10 @@ __cmpxchg(volatile void *ptr, unsigned long expected, unsigned long new)
 	"	scond   %3, [%1]	\n"
 	"	bnz     1b		\n"
 	"2:				\n"
-	: "=&r"(prev)	/* Early clobber, to prevent reg reuse */
-	: "r"(ptr),	/* Not "m": llock only supports reg direct addr mode */
-	  "ir"(expected),
-	  "r"(new)	/* can't be "ir". scond can't take LIMM for "b" */
-	: "cc", "memory"); /* so that gcc knows memory is being written here */
+	: "=&r"(prev)
+	: "r"(ptr), "ir"(expected),
+	  "r"(new) /* can't be "ir". scond can't take limm for "b" */
+	: "cc");

 	return prev;
 }
@@ -19,7 +19,7 @@
 * register API yet */
 #undef DBG_MAX_REG_NUM

-#define GDB_MAX_REGS		87
+#define GDB_MAX_REGS		39

 #define BREAK_INSTR_SIZE	2
 #define CACHE_FLUSH_IS_SAFE	1
@@ -33,27 +33,23 @@ static inline void arch_kgdb_breakpoint(void)

 extern void kgdb_trap(struct pt_regs *regs, int param);

-/* This is the numbering of registers according to the GDB. See GDB's
- * arc-tdep.h for details.
- *
- * Registers are ordered for GDB 7.5. It is incompatible with GDB 6.8. */
-enum arc_linux_regnums {
+enum arc700_linux_regnums {
 	_R0		= 0,
 	_R1, _R2, _R3, _R4, _R5, _R6, _R7, _R8, _R9, _R10, _R11, _R12, _R13,
 	_R14, _R15, _R16, _R17, _R18, _R19, _R20, _R21, _R22, _R23, _R24,
 	_R25, _R26,
-	_FP		= 27,
-	__SP		= 28,
-	_R30		= 30,
-	_BLINK		= 31,
-	_LP_COUNT	= 60,
-	_STOP_PC	= 64,
-	_RET		= 64,
-	_LP_START	= 65,
-	_LP_END		= 66,
-	_STATUS32	= 67,
-	_ECR		= 76,
-	_BTA		= 82,
+	_BTA		= 27,
+	_LP_START	= 28,
+	_LP_END		= 29,
+	_LP_COUNT	= 30,
+	_STATUS32	= 31,
+	_BLINK		= 32,
+	_FP		= 33,
+	__SP		= 34,
+	_EFA		= 35,
+	_RET		= 36,
+	_ORIG_R8	= 37,
+	_STOP_PC	= 38
 };

 #else
@@ -270,8 +270,7 @@ static inline void pmd_set(pmd_t *pmdp, pte_t *ptep)
 #define pmd_clear(xp)			do { pmd_val(*(xp)) = 0; } while (0)

 #define pte_page(x) (mem_map + \
-		(unsigned long)(((pte_val(x) - CONFIG_LINUX_LINK_BASE) >> \
-				PAGE_SHIFT)))
+		(unsigned long)(((pte_val(x) - PAGE_OFFSET) >> PAGE_SHIFT)))

 #define mk_pte(page, pgprot)						\
 ({									\
@@ -83,7 +83,7 @@ struct callee_regs {
 	long r13;
 };

-#define instruction_pointer(regs)	(unsigned long)((regs)->ret)
+#define instruction_pointer(regs)	((regs)->ret)
 #define profile_pc(regs)		instruction_pointer(regs)

 /* return 1 if user mode or 0 if kernel mode */
@@ -83,10 +83,7 @@
 	"2:	;nop\n"				\
 	"	.section .fixup, \"ax\"\n"	\
 	"	.align 4\n"			\
-	"3:	# return -EFAULT\n"		\
-	"	mov %0, %3\n"			\
-	"	# zero out dst ptr\n"		\
-	"	mov %1,  0\n"			\
+	"3:	mov %0, %3\n"			\
 	"	j   2b\n"			\
 	"	.previous\n"			\
 	"	.section __ex_table, \"a\"\n"	\
@@ -104,11 +101,7 @@
 	"2:	;nop\n"				\
 	"	.section .fixup, \"ax\"\n"	\
 	"	.align 4\n"			\
-	"3:	# return -EFAULT\n"		\
-	"	mov %0, %3\n"			\
-	"	# zero out dst ptr\n"		\
-	"	mov %1,  0\n"			\
-	"	mov %R1, 0\n"			\
+	"3:	mov %0, %3\n"			\
 	"	j   2b\n"			\
 	"	.previous\n"			\
 	"	.section __ex_table, \"a\"\n"	\
@@ -80,14 +80,13 @@ static int restore_usr_regs(struct pt_regs *regs, struct rt_sigframe __user *sf)
 	int err;

 	err = __copy_from_user(&set, &sf->uc.uc_sigmask, sizeof(set));
-	err |= __copy_from_user(regs, &(sf->uc.uc_mcontext.regs.scratch),
+	if (!err)
+		set_current_blocked(&set);
+
+	err |= __copy_from_user(regs, &(sf->uc.uc_mcontext.regs),
 				sizeof(sf->uc.uc_mcontext.regs.scratch));
-	if (err)
-		return err;

-	set_current_blocked(&set);
-
-	return 0;
+	return err;
 }

 static inline int is_do_ss_needed(unsigned int magic)
@@ -132,15 +131,6 @@ SYSCALL_DEFINE0(rt_sigreturn)
 	/* Don't restart from sigreturn */
 	syscall_wont_restart(regs);

-	/*
-	 * Ensure that sigreturn always returns to user mode (in case the
-	 * regs saved on user stack got fudged between save and sigreturn)
-	 * Otherwise it is easy to panic the kernel with a custom
-	 * signal handler and/or restorer which clobberes the status32/ret
-	 * to return to a bogus location in kernel mode.
-	 */
-	regs->status32 |= STATUS_U_MASK;
-
 	return regs->r0;

 badframe:
@@ -244,11 +234,8 @@ setup_rt_frame(int signo, struct k_sigaction *ka, siginfo_t *info,

 	/*
 	 * handler returns using sigreturn stub provided already by userpsace
-	 * If not, nuke the process right away
 	 */
-	if(!(ka->sa.sa_flags & SA_RESTORER))
-		return 1;
-
+	BUG_ON(!(ka->sa.sa_flags & SA_RESTORER));
 	regs->blink = (unsigned long)ka->sa.sa_restorer;

 	/* User Stack for signal handler will be above the frame just carved */
@@ -315,12 +302,12 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
 	      struct pt_regs *regs)
 {
 	sigset_t *oldset = sigmask_to_save();
-	int failed;
+	int ret;

 	/* Set up the stack frame */
-	failed = setup_rt_frame(sig, ka, info, oldset, regs);
+	ret = setup_rt_frame(sig, ka, info, oldset, regs);

-	if (failed)
+	if (ret)
 		force_sigsegv(sig, current);
 	else
 		signal_delivered(sig, info, ka, regs, 0);
@@ -131,7 +131,7 @@ arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
 	 * prelogue is setup (callee regs saved and then fp set and not other
 	 * way around
 	 */
-	pr_warn_once("CONFIG_ARC_DW2_UNWIND needs to be enabled\n");
+	pr_warn("CONFIG_ARC_DW2_UNWIND needs to be enabled\n");
 	return 0;

 #endif
@@ -228,9 +228,8 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
 	if (state.fault)
 		goto fault;

-	/* clear any remanants of delay slot */
 	if (delay_mode(regs)) {
-		regs->ret = regs->bta & ~1U;
+		regs->ret = regs->bta;
 		regs->status32 &= ~STATUS_DE_MASK;
 	} else {
 		regs->ret += state.instr_len;
@@ -984,13 +984,42 @@ int arc_unwind(struct unwind_frame_info *frame)
 							    (const u8 *)(fde +
 									 1) +
 							    *fde, ptrType);
-				if (pc >= endLoc) {
+				if (pc >= endLoc)
 					fde = NULL;
-					cie = NULL;
-				}
-			} else {
+			} else
 				fde = NULL;
-				cie = NULL;
+		}
+		if (fde == NULL) {
+			for (fde = table->address, tableSize = table->size;
+			     cie = NULL, tableSize > sizeof(*fde)
+			     && tableSize - sizeof(*fde) >= *fde;
+			     tableSize -= sizeof(*fde) + *fde,
+			     fde += 1 + *fde / sizeof(*fde)) {
+				cie = cie_for_fde(fde, table);
+				if (cie == &bad_cie) {
+					cie = NULL;
+					break;
+				}
+				if (cie == NULL
+				    || cie == &not_fde
+				    || (ptrType = fde_pointer_type(cie)) < 0)
+					continue;
+				ptr = (const u8 *)(fde + 2);
+				startLoc = read_pointer(&ptr,
+							(const u8 *)(fde + 1) +
+							*fde, ptrType);
+				if (!startLoc)
+					continue;
+				if (!(ptrType & DW_EH_PE_indirect))
+					ptrType &=
+					    DW_EH_PE_FORM | DW_EH_PE_signed;
+				endLoc =
+				    startLoc + read_pointer(&ptr,
+							    (const u8 *)(fde +
+									 1) +
+							    *fde, ptrType);
+				if (pc >= startLoc && pc < endLoc)
+					break;
 			}
 		}
 	}
@@ -59,7 +59,8 @@ void do_page_fault(struct pt_regs *regs, int write, unsigned long address,
 	struct mm_struct *mm = tsk->mm;
 	siginfo_t info;
 	int fault, ret;
-	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
+	unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
+				(write ? FAULT_FLAG_WRITE : 0);

 	/*
 	 * We fault-in kernel-space virtual memory on-demand. The
@@ -87,8 +88,6 @@ void do_page_fault(struct pt_regs *regs, int write, unsigned long address,
 	if (in_atomic() || !mm)
 		goto no_context;

-	if (user_mode(regs))
-		flags |= FAULT_FLAG_USER;
 retry:
 	down_read(&mm->mmap_sem);
 	vma = find_vma(mm, address);
@@ -116,12 +115,12 @@ good_area:
 	if (write) {
 		if (!(vma->vm_flags & VM_WRITE))
 			goto bad_area;
-		flags |= FAULT_FLAG_WRITE;
 	} else {
 		if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
 			goto bad_area;
 	}

+survive:
 	/*
 	 * If for any reason at all we couldn't handle the fault,
 	 * make sure we exit gracefully rather than endlessly redo
@@ -160,8 +159,6 @@ good_area:
 	/* TBD: switch to pagefault_out_of_memory() */
 	if (fault & VM_FAULT_OOM)
 		goto out_of_memory;
-	else if (fault & VM_FAULT_SIGSEGV)
-		goto bad_area;
 	else if (fault & VM_FAULT_SIGBUS)
 		goto do_sigbus;

@@ -203,12 +200,14 @@ no_context:
 	die("Oops", regs, address, cause_code);

 out_of_memory:
+	if (is_global_init(tsk)) {
+		yield();
+		goto survive;
+	}
 	up_read(&mm->mmap_sem);

-	if (user_mode(regs)) {
-		pagefault_out_of_memory();
-		return;
-	}
+	if (user_mode(regs))
+		do_group_exit(SIGKILL);	/* This will never return */

 	goto no_context;

@@ -64,7 +64,7 @@ arch_get_unmapped_area(struct file *filp, unsigned long addr,

 		vma = find_vma(mm, addr);
 		if (TASK_SIZE - len >= addr &&
-		    (!vma || addr + len <= vm_start_gap(vma)))
+		    (!vma || addr + len <= vma->vm_start))
 			return addr;
 	}

@@ -219,7 +219,7 @@ ex_saved_reg1:
 #ifdef CONFIG_SMP
 	sr  r0, [ARC_REG_SCRATCH_DATA0]	; freeup r0 to code with
 	GET_CPU_ID  r0			; get to per cpu scratch mem,
-	asl r0, r0, L1_CACHE_SHIFT	; cache line wide per cpu
+	lsl r0, r0, L1_CACHE_SHIFT	; cache line wide per cpu
 	add r0, @ex_saved_reg1, r0
 #else
 	st    r0, [@ex_saved_reg1]
@@ -239,7 +239,7 @@ ex_saved_reg1:
 .macro TLBMISS_RESTORE_REGS
 #ifdef CONFIG_SMP
 	GET_CPU_ID  r0			; get to per cpu scratch mem
-	asl r0, r0, L1_CACHE_SHIFT	; each is cache line wide
+	lsl r0, r0, L1_CACHE_SHIFT	; each is cache line wide
 	add r0, @ex_saved_reg1, r0
 	ld_s  r3, [r0,12]
 	ld_s  r2, [r0, 8]
@@ -636,120 +636,6 @@ config ARCH_MSM
 	  stack and controls some vital subsystems
 	  (clock and power control, etc).

-config ARCH_MT6572
-	bool "MediaTek MT6572"
-	select GENERIC_TIME
-	select GENERIC_CLOCKEVENTS
-	select ARCH_HAS_CPUFREQ
-	select ARM_AMBA
-	select CPU_V7
-	select HAVE_SMP
-	select NEED_MACH_MEMORY_H
-	select VFP_OPT
-	help
-	  This enable support for MediaTek MT6572
-
-config ARCH_MT6595
-	bool "MediaTek MT6595"
-	select GENERIC_TIME
-	select GENERIC_CLOCKEVENTS
-	select ARCH_HAS_CPUFREQ
-	select ARM_AMBA
-	select CPU_V7
-	select HAVE_SMP
-	select NEED_MACH_MEMORY_H
-	select FIQ_GLUE
-	select IRQ_DOMAIN
-	select IRQ_DOMAIN_DEBUG
-	select ARCH_REQUIRE_GPIOLIB
-	select ARM_ERRATA_828419
-	select ARM_ERRATA_828420
-	select ARM_ERRATA_831171
-	select VFP_OPT
-	select MTK_CPU_STRESS
-	select MTK_LASTPC
-	select MTK_SYSTRACKER
-	select ZONE_DMA if ARM_LPAE
-	help
-	  This enable support for MediaTek MT6595
-
-config ARCH_MT6582
-	bool "MediaTek MT6582"
-	select GENERIC_TIME
-	select GENERIC_CLOCKEVENTS
-	select ARCH_HAS_CPUFREQ
-	select ARM_AMBA
-	select CPU_V7
-	select HAVE_SMP
-	select NEED_MACH_MEMORY_H
-	select L1C_OPT
-	select VFP_OPT
-	select HAVE_TRUSTONIC_TEE_SUPPORT
-	select MTK_CPU_STRESS
-	select MTK_DBG_DUMP
-	select MTK_KERNEL_IN_SECURE_MODE if ((!TRUSTONIC_TEE_SUPPORT) && (!ARM_PSCI))
-	select FIQ_GLUE if TRUSTONIC_TEE_SUPPORT
-	help
-	  This enable support for MediaTek MT6582.
-
-config ARCH_MT6592
-	bool "MediaTek MT6592"
-	select GENERIC_TIME
-	select GENERIC_CLOCKEVENTS
-	select ARCH_HAS_CPUFREQ
-	select ARM_AMBA
-	select CPU_V7
-	select HAVE_SMP
-	select NEED_MACH_MEMORY_H
-	select ARM_HAS_SG_CHAIN
-	select VFP_OPT
-	select HAVE_TRUSTONIC_TEE_SUPPORT
-	select L1C_OPT
-	help
-	  This enable support for MediaTek MT6592.
-
-config ARCH_MT6752
-	bool "MediaTek MT6752"
-	select GENERIC_TIME
-	select GENERIC_CLOCKEVENTS
-	select ARCH_HAS_CPUFREQ
-	select ARM_AMBA
-	select CPU_V7
-	select HAVE_SMP
-	select NEED_MACH_MEMORY_H
-	select IRQ_DOMAIN
-	select IRQ_DOMAIN_DEBUG
-	select GENERIC_SCHED_CLOCK
-	select VFP_OPT
-	select MTK_SYSTRACKER
-	select MTK_L2C_SHARE
-	select ARM_ERRATA_824069
-	select ARM_ERRATA_826319
-	select ARCH_REQUIRE_GPIOLIB
-	select MTK_EIC
-	select MTK_ETM
-	help
-	  This enable support for MediaTek MT6752
-
-config ARCH_MT6795
-	bool "MediaTek MT6795"
-	select GENERIC_TIME
-	select GENERIC_CLOCKEVENTS
-	select ARCH_HAS_CPUFREQ
-	select ARM_AMBA
-	select CPU_V7
-	select HAVE_SMP
-	select NEED_MACH_MEMORY_H
-	select FIQ_GLUE
-	select IRQ_DOMAIN
-	select IRQ_DOMAIN_DEBUG
-	select GENERIC_SCHED_CLOCK
-	select ARM_ERRATA_828419
-	select ARM_ERRATA_828420
-	select VFP_OPT
-	help
-	  This enable support for MediaTek MT6795
-
 config ARCH_MT8127
 	bool "MediaTek MT8127"
 	select GENERIC_TIME
@@ -763,7 +649,6 @@ config ARCH_MT8127
 	select IRQ_DOMAIN
 	select IRQ_DOMAIN_DEBUG
 	select ARCH_REQUIRE_GPIOLIB
-	select VFP_OPT
 	select HAVE_MTK_IN_HOUSE_TEE_SUPPORT
 	help
 	  This enable support for MediaTek MT8127
@@ -1090,18 +975,6 @@ source "arch/arm/mach-ks8695/Kconfig"

 source "arch/arm/mach-msm/Kconfig"

-if ARCH_MT6572
-#source "arch/arm/mach-mt6572/Kconfig"
-endif
-
-if ARCH_MT6582
-#source "arch/arm/mach-mt6582/Kconfig"
-endif
-
-if ARCH_MT6592
-#source "arch/arm/mach-mt6592/Kconfig"
-endif
-
 if ARCH_MT8127
 source "arch/arm/mach-mt8127/Kconfig"
 endif
@@ -1857,6 +1730,14 @@ config HMP_POWER_AWARE_CONTROLLER
 	help
 		Power-aware scheduler for b.L MP controller and status interface

+config TOUCH_BOOST
+        bool "Touch boost"
+        help
+                This option enables touch boost. It is implemented by registering an
+                input event handler. Once dynamic_boost driver receives a input event,
+                it will hotplug on 2 CA7s and set max frequency. Touch boost is a
+                one-time boost mechanism.
+
 config HEVTASK_INTERFACE
 	bool "task status interface"
 	help
@@ -55,14 +55,6 @@ endif

 comma = ,

-#
-# The Scalar Replacement of Aggregates (SRA) optimization pass in GCC 4.9 and
-# later may result in code being generated that handles signed short and signed
-# char struct members incorrectly. So disable it.
-# (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932)
-#
-KBUILD_CFLAGS	+= $(call cc-option,-fno-ipa-sra)
-
 # This selects which instruction set is used.
 # Note that GCC does not numerically define an architecture version
 # macro, but instead defines a whole series of macros which makes
@@ -303,9 +295,7 @@ boot := arch/arm/boot
 archprepare:
 	$(Q)$(MAKE) $(build)=arch/arm/tools include/generated/mach-types.h
 -include $(srctree)/scripts/ptgen/$(MTK_PLATFORM)/ptgen.mk
-ifeq ($(CONFIG_MTK_USE_DRVGEN),y)
 -include $(srctree)/scripts/drvgen/drvgen.mk
-endif
 -include $(srctree)/scripts/ptgen/$(MTK_PLATFORM)/ptgen.mk
 # Convert bzImage to zImage
 bzImage: zImage
@@ -1,7 +0,0 @@
-Image
-zImage
-xipImage
-bootpImage
-uImage
-*.dtb
-zImage-dtb
@@ -1,19 +0,0 @@
-ashldi3.S
-font.c
-lib1funcs.S
-hyp-stub.S
-piggy.gzip
-piggy.lzo
-piggy.lzma
-piggy.xzkern
-vmlinux
-vmlinux.lds
-
-# borrowed libfdt files
-fdt.c
-fdt.h
-fdt_ro.c
-fdt_rw.c
-fdt_wip.c
-libfdt.h
-libfdt_internal.h
@@ -715,7 +715,7 @@ __armv7_mmu_cache_on:
 		orrne	r0, r0, #1		@ MMU enabled
 		movne	r1, #0xfffffffd		@ domain 0 = client
 		bic     r6, r6, #1 << 31        @ 32-bit translation system
-		bic     r6, r6, #(7 << 0) | (1 << 4)	@ use only ttbr0
+		bic     r6, r6, #3 << 0         @ use only ttbr0
 		mcrne	p15, 0, r3, c2, c0, 0	@ load page table pointer
 		mcrne	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
 		mcr	p15, 0, r0, c7, c5, 4	@ ISB
@@ -32,10 +32,6 @@
 			  0xf0000000 0 0xf0000000 0x8000000     /* Device Bus, NOR 128MiB   */>;

 		internal-regs {
-			rtc@10300 {
-				/* No crystal connected to the internal RTC */
-				status = "disabled";
-			};
 			serial@12000 {
 				clock-frequency = <250000000>;
 				status = "okay";
@@ -0,0 +1,30 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			ncp1854@36 {
+				compatible = "ncp1854";
+				reg = <0x36>;
+			};
+		};
+    TOUCH@0 {
+    	compatible = "mediatek,TPD";
+		eint-gpio = <139 1>;
+		rst-gpio = <144 1>;
+		interrupts = <139 2>;
+	};
+};
@@ -59,7 +59,6 @@
 				#size-cells = <1>;
 				compatible = "m25p64";
 				spi-max-frequency = <30000000>;
-				m25p,fast-read;
 				reg = <0>;
 				partition@0 {
 					label = "U-Boot-SPL";
@@ -0,0 +1,28 @@
+/*
+ * Mediatek's MT6595 SoC device tree source
+ *
+ * Copyright (c) 2013 MediaTek Co., Ltd.
+ *              http://www.mediatek.com
+ *
+ */
+
+/dts-v1/;
+/include/ "mt6595.dtsi"
+/include/ "cust_eint.dtsi"
+
+/ {
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+		
+		HAN@0x13000000 {
+			compatible = "mediatek,HAN";
+			reg = <0x13000000 0xFFFF>;
+			interrupts = <0 217 0x8>;
+			interrupt-names = "RGX";
+			clock-frequency = <600000000>;
+		};
+	};
+};
@@ -75,7 +75,7 @@

 		uart2: serial@12200 {
 			compatible = "ns16550a";
-			reg = <0x12200 0x100>;
+			reg = <0x12000 0x100>;
 			reg-shift = <2>;
 			interrupts = <9>;
 			clocks = <&core_clk 0>;
@@ -84,7 +84,7 @@

 		uart3: serial@12300 {
 			compatible = "ns16550a";
-			reg = <0x12300 0x100>;
+			reg = <0x12100 0x100>;
 			reg-shift = <2>;
 			interrupts = <10>;
 			clocks = <&core_clk 0>;
@@ -0,0 +1,14 @@
+/*
+ * Mediatek's MT6595 SoC device tree source
+ *
+ * Copyright (c) 2013 MediaTek Co., Ltd.
+ *              http://www.mediatek.com
+ *
+ */
+
+/dts-v1/;
+/include/ "mt6595.dtsi"
+/include/ "cust_eint.dtsi"
+
+/ {
+};
@@ -0,0 +1,30 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+	};
+};
@@ -0,0 +1,30 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+	};
+};
@@ -0,0 +1,30 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+	};
+};
@@ -0,0 +1,30 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+	};
+};
@@ -0,0 +1,30 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+	};
+};
@@ -0,0 +1,63 @@
+
+/dts-v1/;
+
+/include/ "mt6735.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			gt9xx@5d {
+				compatible = "gt9xx";
+				reg = <0x5d>;
+			};
+
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+
+		I2C1@0x11008000 {
+			yas533@2e {
+				compatible = "yas533";
+				reg = <0x2e>;
+			};
+
+			mpu-6515@68 {
+				compatible = "mpu-6515";
+				reg = <0x68>;
+			};
+
+			bmp180@77 {
+				compatible = "bmp180";
+				reg = <0x77>;
+			};
+
+			cm36652@60 {
+				compatble = "cm36652";
+				reg = <0x60>;
+			};
+
+			mt6605@28 {
+				compatible = "mediatek,mt6605";
+				reg = <0x28>;
+			};
+		};
+
+	};
+};
@@ -89,7 +89,6 @@

 	ahb@80080000 {
 		usb0: usb@80080000 {
-			dr_mode = "host";
 			vbus-supply = <&reg_usb0_vbus>;
 			status = "okay";
 		};
@@ -141,7 +141,7 @@
 				#size-cells = <0>;
 				compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
 				reg = <0x43fa4000 0x4000>;
-				clocks = <&clks 78>, <&clks 78>;
+				clocks = <&clks 62>, <&clks 62>;
 				clock-names = "ipg", "per";
 				interrupts = <14>;
 				status = "disabled";
@@ -335,7 +335,7 @@
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
 				#pwm-cells = <2>;
 				reg = <0x53fa0000 0x4000>;
-				clocks = <&clks 106>, <&clks 52>;
+				clocks = <&clks 106>, <&clks 36>;
 				clock-names = "ipg", "per";
 				interrupts = <36>;
 			};
@@ -354,7 +354,7 @@
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
 				#pwm-cells = <2>;
 				reg = <0x53fa8000 0x4000>;
-				clocks = <&clks 107>, <&clks 52>;
+				clocks = <&clks 107>, <&clks 36>;
 				clock-names = "ipg", "per";
 				interrupts = <41>;
 			};
@@ -393,9 +393,8 @@

 			pwm4: pwm@53fc8000 {
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-				#pwm-cells = <2>;
 				reg = <0x53fc8000 0x4000>;
-				clocks = <&clks 108>, <&clks 52>;
+				clocks = <&clks 108>, <&clks 36>;
 				clock-names = "ipg", "per";
 				interrupts = <42>;
 			};
@@ -440,7 +439,7 @@
 				compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
 				#pwm-cells = <2>;
 				reg = <0x53fe0000 0x4000>;
-				clocks = <&clks 105>, <&clks 52>;
+				clocks = <&clks 105>, <&clks 36>;
 				clock-names = "ipg", "per";
 				interrupts = <26>;
 			};
@@ -290,7 +290,7 @@

 			fec: ethernet@1002b000 {
 				compatible = "fsl,imx27-fec";
-				reg = <0x1002b000 0x1000>;
+				reg = <0x1002b000 0x4000>;
 				interrupts = <50>;
 				clocks = <&clks 48>, <&clks 67>, <&clks 0>;
 				clock-names = "ipg", "ahb", "ptp";
@@ -691,7 +691,7 @@
 					      80 81 68 69
 					      70 71 72 73
 					      74 75 76 77>;
-				interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
+				interrupt-names = "auart4-rx", "aurat4-tx", "spdif-tx", "empty",
 						  "saif0", "saif1", "i2c0", "i2c1",
 						  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
 						  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
@@ -20,11 +20,11 @@
 		serial4 = &uart5;
 	};

-	avic: interrupt-controller@68000000 {
+	avic: avic-interrupt-controller@60000000 {
 		compatible = "fsl,imx31-avic", "fsl,avic";
 		interrupt-controller;
 		#interrupt-cells = <1>;
-		reg = <0x68000000 0x100000>;
+		reg = <0x60000000 0x100000>;
 	};

 	soc {
@@ -93,6 +93,13 @@
 				clock-names = "ipg", "per";
 				status = "disabled";
 			};
+
+			clks: ccm@53f80000{
+				compatible = "fsl,imx31-ccm";
+				reg = <0x53f80000 0x4000>;
+				interrupts = <0 31 0x04 0 53 0x04>;
+				#clock-cells = <1>;
+			};
 		};

 		aips@53f00000 { /* AIPS2 */
@@ -102,13 +109,6 @@
 			reg = <0x53f00000 0x100000>;
 			ranges;

-			clks: ccm@53f80000{
-				compatible = "fsl,imx31-ccm";
-				reg = <0x53f80000 0x4000>;
-				interrupts = <31>, <53>;
-				#clock-cells = <1>;
-			};
-
 			gpt: timer@53f90000 {
 				compatible = "fsl,imx31-gpt";
 				reg = <0x53f90000 0x4000>;
@@ -0,0 +1,133 @@
+/*
+ * MediaTek MT8135
+ *
+ * Cortex-A7x1 Cortex-A15x1
+ */
+
+/dts-v1/;
+
+/memreserve/ 0xff000000 0x01000000;
+
+/ {
+	model = "MT8135";
+	compatible = "mediatek,mt8135";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clusters {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cluster0: cluster@0 {
+			reg = <0>;
+			freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core0: core@0 {
+					reg = <0>;
+				};
+			};
+		};
+
+		cluster1: cluster@1 {
+			reg = <1>;
+			freqs = <350000000 400000000 500000000 600000000 700000000 800000000 900000000 1000000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core1: core@0 {
+					reg = <0>;
+				};
+			};
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			cluster = <&cluster0>;
+			core = <&core0>;
+			clock-frequency = <1000000000>;
+		};
+
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x100>;
+			cluster = <&cluster1>;
+			core = <&core1>;
+			clock-frequency = <1000000000>;
+		};
+
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0x80000000>;
+	};
+
+	cci-pmu@10320000 {
+		compatible = "arm,cci-400-pmu";
+		reg = <0 0x10320000 0 0x10000>;
+		interrupts = <0 24 4>,
+			     <0 25 4>,
+			     <0 29 4>,
+			     <0 30 4>,
+			     <0 31 4>;
+	};
+
+	gic: interrupt-controller@10211000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x10211000 0 0x1000>,
+		      <0 0x10212000 0 0x1000>,
+		      <0 0x10214000 0 0x2000>,
+		      <0 0x10216000 0 0x2000>;
+		interrupts = <1 9 0xf04>;
+
+		gic-cpuif@0 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <0>;
+			cpu = <&cpu0>;
+		};
+		gic-cpuif@2 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <2>;
+			cpu = <&cpu1>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+	};
+
+	pmu_a7 {
+		compatible = "arm,cortex-a7-pmu";
+		cluster  = <&cluster0>;
+		interrupts = <0 6 4>;
+	};
+
+	pmu_a15 {
+		compatible = "arm,cortex-a15-pmu";
+		cluster  = <&cluster1>;
+		interrupts = <0 203 4>;
+	};
+};
@@ -0,0 +1,98 @@
+/*
+ * MediaTek MT8135
+ *
+ * Cortex-A7x1 
+ */
+
+/dts-v1/;
+
+/memreserve/ 0xff000000 0x01000000;
+
+/ {
+	model = "MT8135";
+	compatible = "mediatek,mt8135";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clusters {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cluster0: cluster@0 {
+			reg = <0>;
+			freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core0: core@0 {
+					reg = <0>;
+				};
+			};
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			cluster = <&cluster0>;
+			core = <&core0>;
+			clock-frequency = <1000000000>;
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0x80000000>;
+	};
+
+	cci-pmu@10320000 {
+		compatible = "arm,cci-400-pmu";
+		reg = <0 0x10320000 0 0x10000>;
+		interrupts = <0 24 4>,
+			     <0 25 4>,
+			     <0 29 4>,
+			     <0 30 4>,
+			     <0 31 4>;
+	};
+
+	gic: interrupt-controller@10211000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x10211000 0 0x1000>,
+		      <0 0x10212000 0 0x1000>,
+		      <0 0x10214000 0 0x2000>,
+		      <0 0x10216000 0 0x2000>;
+		interrupts = <1 9 0xf04>;
+
+		gic-cpuif@0 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <0>;
+			cpu = <&cpu0>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+	};
+
+	pmu_a7 {
+		compatible = "arm,cortex-a7-pmu";
+		cluster  = <&cluster0>;
+		interrupts = <0 6 4>;
+	};
+};
@@ -0,0 +1,151 @@
+/*
+ * MediaTek MT8135
+ *
+ * Cortex-A7x2 Cortex-A15x1
+ */
+
+/dts-v1/;
+
+/memreserve/ 0xff000000 0x01000000;
+
+/ {
+	model = "MT8135";
+	compatible = "mediatek,mt8135";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clusters {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cluster0: cluster@0 {
+			reg = <0>;
+			freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core0: core@0 {
+					reg = <0>;
+				};
+
+				core1: core@1 {
+					reg = <1>;
+				};
+
+			};
+		};
+
+		cluster1: cluster@1 {
+			reg = <1>;
+			freqs = <350000000 400000000 500000000 600000000 700000000 800000000 900000000 1000000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core2: core@0 {
+					reg = <0>;
+				};
+			};
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			cluster = <&cluster0>;
+			core = <&core0>;
+			clock-frequency = <1000000000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x001>;
+			cluster = <&cluster0>;
+			core = <&core1>;
+			clock-frequency = <1000000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x100>;
+			cluster = <&cluster1>;
+			core = <&core2>;
+			clock-frequency = <1000000000>;
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0x80000000>;
+	};
+
+	cci-pmu@10320000 {
+		compatible = "arm,cci-400-pmu";
+		reg = <0 0x10320000 0 0x10000>;
+		interrupts = <0 24 4>,
+			     <0 25 4>,
+			     <0 29 4>,
+			     <0 30 4>,
+			     <0 31 4>;
+	};
+
+	gic: interrupt-controller@10211000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x10211000 0 0x1000>,
+		      <0 0x10212000 0 0x1000>,
+		      <0 0x10214000 0 0x2000>,
+		      <0 0x10216000 0 0x2000>;
+		interrupts = <1 9 0xf04>;
+
+		gic-cpuif@0 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <0>;
+			cpu = <&cpu0>;
+		};
+		gic-cpuif@1 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <1>;
+			cpu = <&cpu1>;
+		};
+		gic-cpuif@2 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <2>;
+			cpu = <&cpu2>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+	};
+
+	pmu_a7 {
+		compatible = "arm,cortex-a7-pmu";
+		cluster  = <&cluster0>;
+		interrupts = <0 6 4>,
+			     <0 7 4>;
+	};
+
+	pmu_a15 {
+		compatible = "arm,cortex-a15-pmu";
+		cluster  = <&cluster1>;
+		interrupts = <0 203 4>;
+	};
+};
@@ -0,0 +1,170 @@
+/*
+ * MediaTek MT8135
+ *
+ * Cortex-A7x2 Cortex-A15x2
+ */
+
+/dts-v1/;
+
+/memreserve/ 0xff000000 0x01000000;
+
+/ {
+	model = "MT8135";
+	compatible = "mediatek,mt8135";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clusters {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cluster0: cluster@0 {
+			reg = <0>;
+			freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core0: core@0 {
+					reg = <0>;
+				};
+
+				core1: core@1 {
+					reg = <1>;
+				};
+
+			};
+		};
+
+		cluster1: cluster@1 {
+			reg = <1>;
+			freqs = <350000000 400000000 500000000 600000000 700000000 800000000 900000000 1000000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core2: core@0 {
+					reg = <0>;
+				};
+
+				core3: core@1 {
+					reg = <1>;
+				};
+			};
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			cluster = <&cluster0>;
+			core = <&core0>;
+			clock-frequency = <1000000000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x001>;
+			cluster = <&cluster0>;
+			core = <&core1>;
+			clock-frequency = <1000000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x100>;
+			cluster = <&cluster1>;
+			core = <&core2>;
+			clock-frequency = <1000000000>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a15";
+			reg = <0x101>;
+			cluster = <&cluster1>;
+			core = <&core3>;
+			clock-frequency = <1000000000>;
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0x80000000>;
+	};
+
+	cci-pmu@10320000 {
+		compatible = "arm,cci-400-pmu";
+		reg = <0 0x10320000 0 0x10000>;
+		interrupts = <0 24 4>,
+			     <0 25 4>,
+			     <0 29 4>,
+			     <0 30 4>,
+			     <0 31 4>;
+	};
+
+	gic: interrupt-controller@10211000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x10211000 0 0x1000>,
+		      <0 0x10212000 0 0x1000>,
+		      <0 0x10214000 0 0x2000>,
+		      <0 0x10216000 0 0x2000>;
+		interrupts = <1 9 0xf04>;
+
+		gic-cpuif@0 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <0>;
+			cpu = <&cpu0>;
+		};
+		gic-cpuif@1 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <1>;
+			cpu = <&cpu1>;
+		};
+		gic-cpuif@2 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <2>;
+			cpu = <&cpu2>;
+		};
+		gic-cpuif@3 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <3>;
+			cpu = <&cpu3>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+	};
+
+	pmu_a7 {
+		compatible = "arm,cortex-a7-pmu";
+		cluster  = <&cluster0>;
+		interrupts = <0 6 4>,
+			     <0 7 4>;
+	};
+
+	pmu_a15 {
+		compatible = "arm,cortex-a15-pmu";
+		cluster  = <&cluster1>;
+		interrupts = <0 203 4>,
+			     <0 204 4>;
+	};
+};
@@ -0,0 +1,118 @@
+/*
+ * MediaTek MT8135
+ *
+ * Cortex-A7x2
+ */
+
+/dts-v1/;
+
+/memreserve/ 0xff000000 0x01000000;
+
+/ {
+	model = "MT8135";
+	compatible = "mediatek,mt8135";
+	interrupt-parent = <&gic>;
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen { };
+
+	clusters {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cluster0: cluster@0 {
+			reg = <0>;
+			freqs = <500000000 600000000 700000000 800000000 900000000 1000000000 1100000000 1200000000>;
+			cores {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				core0: core@0 {
+					reg = <0>;
+				};
+
+				core1: core@1 {
+					reg = <1>;
+				};
+
+			};
+		};
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x000>;
+			cluster = <&cluster0>;
+			core = <&core0>;
+			clock-frequency = <1000000000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a7";
+			reg = <0x001>;
+			cluster = <&cluster0>;
+			core = <&core1>;
+			clock-frequency = <1000000000>;
+		};
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0 0x80000000 0 0x80000000>;
+	};
+
+	cci-pmu@10320000 {
+		compatible = "arm,cci-400-pmu";
+		reg = <0 0x10320000 0 0x10000>;
+		interrupts = <0 24 4>,
+			     <0 25 4>,
+			     <0 29 4>,
+			     <0 30 4>,
+			     <0 31 4>;
+	};
+
+	gic: interrupt-controller@10211000 {
+		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
+		#interrupt-cells = <3>;
+		#address-cells = <0>;
+		interrupt-controller;
+		reg = <0 0x10211000 0 0x1000>,
+		      <0 0x10212000 0 0x1000>,
+		      <0 0x10214000 0 0x2000>,
+		      <0 0x10216000 0 0x2000>;
+		interrupts = <1 9 0xf04>;
+
+		gic-cpuif@0 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <0>;
+			cpu = <&cpu0>;
+		};
+		gic-cpuif@1 {
+			compatible = "arm,gic-cpuif";
+			cpuif-id = <1>;
+			cpu = <&cpu1>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 13 0xf08>,
+			     <1 14 0xf08>,
+			     <1 11 0xf08>,
+			     <1 10 0xf08>;
+	};
+
+	pmu_a7 {
+		compatible = "arm,cortex-a7-pmu";
+		cluster  = <&cluster0>;
+		interrupts = <0 6 4>,
+			     <0 7 4>;
+	};
+};
@@ -0,0 +1,122 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x000>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x001>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x002>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x003>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		/* reserve cpu4~7 since we cannot reduce cpu core numbers */
+		cpu4: cpu@4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x100>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu5: cpu@5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x101>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu6: cpu@6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x102>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu7: cpu@7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x103>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+		
+		MALI@0x13040000 {
+			compatible = "arm,malit760", "arm,mali-t76x", "arm,malit7xx", "arm,mali-midgard";
+			reg = <0x13040000 0x4000>;
+			interrupts = <0 227 0x8>, <0 226 0x8>, <0 225 0x8>;
+			interrupt-names = "JOB", "MMU", "GPU";
+			clock-frequency = <500000000>;
+		};
+	};
+    TOUCH@0 {
+    	compatible = "mediatek,TPD";
+		eint-gpio = <139 1>;
+		rst-gpio = <144 1>;
+		interrupts = <139 2>;
+	};
+};
@@ -0,0 +1,122 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x000>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x001>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x002>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x003>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		/* reserve cpu4~7 since we cannot reduce cpu core numbers */
+		cpu4: cpu@4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x100>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu5: cpu@5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x101>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu6: cpu@6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x102>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu7: cpu@7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x103>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+		
+		MALI@0x13040000 {
+			compatible = "arm,malit760", "arm,mali-t76x", "arm,malit7xx", "arm,mali-midgard";
+			reg = <0x13040000 0x4000>;
+			interrupts = <0 227 0x8>, <0 226 0x8>, <0 225 0x8>;
+			interrupt-names = "JOB", "MMU", "GPU";
+			clock-frequency = <500000000>;
+		};
+	};
+    TOUCH@0 {
+    	compatible = "mediatek,TPD";
+		eint-gpio = <139 1>;
+		rst-gpio = <144 1>;
+		interrupts = <139 2>;
+	};
+};
@@ -0,0 +1,122 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x000>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x001>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu2: cpu@2 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x002>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu3: cpu@3 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x003>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		/* reserve cpu4~7 since we cannot reduce cpu core numbers */
+		cpu4: cpu@4 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x100>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu5: cpu@5 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x101>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu6: cpu@6 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x102>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+
+		cpu7: cpu@7 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a53";
+			reg = <0x103>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x40000200>;
+			clock-frequency = <1500000000>;
+		};
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+		
+		MALI@0x13040000 {
+			compatible = "arm,malit760", "arm,mali-t76x", "arm,malit7xx", "arm,mali-midgard";
+			reg = <0x13040000 0x4000>;
+			interrupts = <0 227 0x8>, <0 226 0x8>, <0 225 0x8>;
+			interrupt-names = "JOB", "MMU", "GPU";
+			clock-frequency = <500000000>;
+		};
+	};
+    TOUCH@0 {
+    	compatible = "mediatek,TPD";
+		eint-gpio = <139 1>;
+		rst-gpio = <144 1>;
+		interrupts = <139 2>;
+	};
+};
@@ -0,0 +1,78 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			gt9xx@5d {
+				compatible = "gt9xx";
+				reg = <0x5d>;
+			};
+
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+
+		I2C1@0x11008000 {
+			yas533@2e {
+				compatible = "yas533";
+				reg = <0x2e>;
+			};
+
+			mpu-6515@68 {
+				compatible = "mpu-6515";
+				reg = <0x68>;
+			};
+
+			bmp180@77 {
+				compatible = "bmp180";
+				reg = <0x77>;
+			};
+
+			cm36652@60 {
+				compatble = "cm36652";
+				reg = <0x60>;
+			};
+
+			mt6605@28 {
+				compatible = "mediatek,mt6605";
+				reg = <0x28>;
+			};
+		};
+
+		MT_SOC_DL1_PCM@0x11220000 {
+			compatible = "mediatek,mt_soc_pcm_dl1";
+			reg = <0x11220000 0x1000>;
+			interrupts = <0 142 0x8>;
+			audclk-gpio = <24 0>;
+			audmiso-gpio = <25 0>;
+			audmosi-gpio = <26 0>;
+			vowclk-gpio = <148 0>;
+            extspkamp-gpio = <78 0>;			
+			i2s1clk-gpio = <135 0>;
+			i2s1dat-gpio = <137 0>;
+			i2s1mclk-gpio = <134 0>;
+			i2s1ws-gpio = <136 0>;
+		};		
+
+	};
+};
@@ -0,0 +1,78 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			gt9xx@5d {
+				compatible = "gt9xx";
+				reg = <0x5d>;
+			};
+
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+
+		I2C1@0x11008000 {
+			yas533@2e {
+				compatible = "yas533";
+				reg = <0x2e>;
+			};
+
+			mpu-6515@68 {
+				compatible = "mpu-6515";
+				reg = <0x68>;
+			};
+
+			bmp180@77 {
+				compatible = "bmp180";
+				reg = <0x77>;
+			};
+
+			cm36652@60 {
+				compatble = "cm36652";
+				reg = <0x60>;
+			};
+
+			mt6605@28 {
+				compatible = "mediatek,mt6605";
+				reg = <0x28>;
+			};
+		};
+
+		MT_SOC_DL1_PCM@0x11220000 {
+			compatible = "mediatek,mt_soc_pcm_dl1";
+			reg = <0x11220000 0x1000>;
+			interrupts = <0 142 0x8>;
+			audclk-gpio = <24 0>;
+			audmiso-gpio = <25 0>;
+			audmosi-gpio = <26 0>;
+			vowclk-gpio = <148 0>;
+            extspkamp-gpio = <78 0>;			
+			i2s1clk-gpio = <135 0>;
+			i2s1dat-gpio = <137 0>;
+			i2s1mclk-gpio = <134 0>;
+			i2s1ws-gpio = <136 0>;
+		};		
+
+	};
+};
@@ -0,0 +1,78 @@
+
+/dts-v1/;
+
+/include/ "mt6752.dtsi"
+
+/ {
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0 0x40000000 0 0x80000000>;
+	};
+
+	bus {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0 0 0xffffffff>;
+
+		I2C0@0x11007000 {
+			gt9xx@5d {
+				compatible = "gt9xx";
+				reg = <0x5d>;
+			};
+
+			bq24261@6b {
+				compatible = "bq24261";
+				reg = <0x6b>;
+			};
+
+			mt6306@64 {
+				compatible = "mediatek,mt6306";
+				reg = <0x64>;
+			};
+		};
+
+		I2C1@0x11008000 {
+			yas533@2e {
+				compatible = "yas533";
+				reg = <0x2e>;
+			};
+
+			mpu-6515@68 {
+				compatible = "mpu-6515";
+				reg = <0x68>;
+			};
+
+			bmp180@77 {
+				compatible = "bmp180";
+				reg = <0x77>;
+			};
+
+			cm36652@60 {
+				compatble = "cm36652";
+				reg = <0x60>;
+			};
+
+			mt6605@28 {
+				compatible = "mediatek,mt6605";
+				reg = <0x28>;
+			};
+		};
+
+		MT_SOC_DL1_PCM@0x11220000 {
+			compatible = "mediatek,mt_soc_pcm_dl1";
+			reg = <0x11220000 0x1000>;
+			interrupts = <0 142 0x8>;
+			audclk-gpio = <24 0>;
+			audmiso-gpio = <25 0>;
+			audmosi-gpio = <26 0>;
+			vowclk-gpio = <148 0>;
+            extspkamp-gpio = <78 0>;			
+			i2s1clk-gpio = <135 0>;
+			i2s1dat-gpio = <137 0>;
+			i2s1mclk-gpio = <134 0>;
+			i2s1ws-gpio = <136 0>;
+		};		
+
+	};
+};
@@ -16,7 +16,7 @@
 */
 #include <linux/module.h>
 #include <linux/kernel.h>
-#include <asm/div64.h>
+
 #include <asm/hardware/icst.h>

 /*
@@ -29,11 +29,7 @@ EXPORT_SYMBOL(icst525_s2div);

 unsigned long icst_hz(const struct icst_params *p, struct icst_vco vco)
 {
-	u64 dividend = p->ref * 2 * (u64)(vco.v + 8);
-	u32 divisor = (vco.r + 2) * p->s2div[vco.s];
-
-	do_div(dividend, divisor);
-	return (unsigned long)dividend;
+	return p->ref * 2 * (vco.v + 8) / ((vco.r + 2) * p->s2div[vco.s]);
 }

 EXPORT_SYMBOL(icst_hz);
@@ -62,7 +58,6 @@ icst_hz_to_vco(const struct icst_params *p, unsigned long freq)

 		if (f > p->vco_min && f <= p->vco_max)
 			break;
-		i++;
 	} while (i < 8);

 	if (i >= 8)
@@ -872,9 +872,9 @@ struct sa1111_save_data {

 #ifdef CONFIG_PM

-static int sa1111_suspend_noirq(struct device *dev)
+static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
 {
-	struct sa1111 *sachip = dev_get_drvdata(dev);
+	struct sa1111 *sachip = platform_get_drvdata(dev);
 	struct sa1111_save_data *save;
 	unsigned long flags;
 	unsigned int val;
@@ -937,9 +937,9 @@ static int sa1111_suspend_noirq(struct device *dev)
 *	restored by their respective drivers, and must be called
 *	via LDM after this function.
 */
-static int sa1111_resume_noirq(struct device *dev)
+static int sa1111_resume(struct platform_device *dev)
 {
-	struct sa1111 *sachip = dev_get_drvdata(dev);
+	struct sa1111 *sachip = platform_get_drvdata(dev);
 	struct sa1111_save_data *save;
 	unsigned long flags, id;
 	void __iomem *base;
@@ -955,7 +955,7 @@ static int sa1111_resume_noirq(struct device *dev)
 	id = sa1111_readl(sachip->base + SA1111_SKID);
 	if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
 		__sa1111_remove(sachip);
-		dev_set_drvdata(dev, NULL);
+		platform_set_drvdata(dev, NULL);
 		kfree(save);
 		return 0;
 	}
@@ -1006,8 +1006,8 @@ static int sa1111_resume_noirq(struct device *dev)
 }

 #else
-#define sa1111_suspend_noirq NULL
-#define sa1111_resume_noirq  NULL
+#define sa1111_suspend NULL
+#define sa1111_resume  NULL
 #endif

 static int sa1111_probe(struct platform_device *pdev)
@@ -1041,11 +1041,6 @@ static int sa1111_remove(struct platform_device *pdev)
 	return 0;
 }

-static struct dev_pm_ops sa1111_pm_ops = {
-	.suspend_noirq = sa1111_suspend_noirq,
-	.resume_noirq = sa1111_resume_noirq,
-};
-
 /*
 *	Not sure if this should be on the system bus or not yet.
 *	We really want some way to register a system device at
@@ -1058,10 +1053,11 @@ static struct dev_pm_ops sa1111_pm_ops = {
 static struct platform_driver sa1111_device_driver = {
 	.probe		= sa1111_probe,
 	.remove		= sa1111_remove,
+	.suspend	= sa1111_suspend,
+	.resume		= sa1111_resume,
 	.driver		= {
 		.name	= "sa1111",
 		.owner	= THIS_MODULE,
-		.pm	= &sa1111_pm_ops,
 	},
 };

@@ -1192,7 +1192,7 @@ CONFIG_CUSTOM_KERNEL_FLASHLIGHT="constant_flashlight"
 CONFIG_CUSTOM_KERNEL_EXTMD=""
 CONFIG_CUSTOM_KERNEL_SSW="ssw_single"
 # CONFIG_MTK_FORCE_CLUSTER1 is not set
-# CONFIG_MTK_MMPROFILE_SUPPORT is not set
+CONFIG_MTK_MMPROFILE_SUPPORT=y
 CONFIG_MTK_HIBERNATION=y
 # CONFIG_CUSTOM_KERNEL_CHARGEPUMP is not set
 # CONFIG_MTK_TC1_FEATURE is not set
@@ -2922,7 +2922,14 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_JFFS2_FS is not set
 # CONFIG_LOGFS is not set
 # CONFIG_CRAMFS is not set
-# CONFIG_SQUASHFS is not set
+CONFIG_SQUASHFS=y
+CONFIG_SQUASHFS_XATTR=y
+# CONFIG_SQUASHFS_ZLIB is not set
+CONFIG_SQUASHFS_LZO=y
+# CONFIG_SQUASHFS_XZ is not set
+CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y
+# CONFIG_SQUASHFS_EMBEDDED is not set
+CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -3305,7 +3312,5 @@ CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
 # CONFIG_CORDIC is not set
 # CONFIG_DDR is not set
 # CONFIG_VIRTUALIZATION is not set
-CONFIG_AMAZON=y
-CONFIG_IDME=y
 CONFIG_MTK_WD_KICKER=y
 CONFIG_MTK_HALL_SENSOR=y
@@ -1191,7 +1191,7 @@ CONFIG_CUSTOM_KERNEL_FLASHLIGHT="constant_flashlight"
 CONFIG_CUSTOM_KERNEL_EXTMD=""
 CONFIG_CUSTOM_KERNEL_SSW="ssw_single"
 # CONFIG_MTK_FORCE_CLUSTER1 is not set
-# CONFIG_MTK_MMPROFILE_SUPPORT is not set
+CONFIG_MTK_MMPROFILE_SUPPORT=y
 CONFIG_MTK_HIBERNATION=y
 # CONFIG_CUSTOM_KERNEL_CHARGEPUMP is not set
 # CONFIG_MTK_TC1_FEATURE is not set
@@ -3303,6 +3303,4 @@ CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
 # CONFIG_CORDIC is not set
 # CONFIG_DDR is not set
 # CONFIG_VIRTUALIZATION is not set
-CONFIG_AMAZON=y
-CONFIG_IDME=y
 CONFIG_MTK_WD_KICKER=y
@@ -105,6 +105,6 @@ module_exit(aes_fini);

 MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm (ASM)");
 MODULE_LICENSE("GPL");
-MODULE_ALIAS_CRYPTO("aes");
-MODULE_ALIAS_CRYPTO("aes-asm");
+MODULE_ALIAS("aes");
+MODULE_ALIAS("aes-asm");
 MODULE_AUTHOR("David McCullough <ucdevel@gmail.com>");
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
ggow	e53c86b915	Remove all the amazon logging hooks	2019-04-20 14:20:25 +01:00
ggow	55194e165f	Remove amazon logging function drivers	2019-04-20 02:24:52 +01:00
ggow	60c2ceebfd	Update Fire 7 configs to remove amazon logging in next commit	2019-04-20 01:51:30 +01:00
ggow	6abb3ea85a	Remove unused kernel configs and unused mach-mt8127(s)	2019-04-20 01:43:48 +01:00
ggow	06d470cc2f	Remove unused build files	2019-04-20 01:31:52 +01:00
ggow	684f7f7f6d	Remove TRAPZ	2019-04-20 01:28:38 +01:00
ggow	6b0b7bcacd	Fix warning: ‘relocs_size’ may be used uninitialized in this function	2019-04-20 01:05:31 +01:00
ggow	b7abd44b0c	Hide the vast compilation warnings from MediaTek/Amazon's sh1tty code	2019-04-20 00:57:59 +01:00
ggow	f8da0e14f7	Fix section mis-match errors	2019-04-20 00:49:08 +01:00
ggow	41bb06d408	Merge changes for austin to form mt8127-common	2019-04-17 23:34:35 +01:00
ggow	f502b7e264	ford_defconfig: Enable high resolution timer support	2019-04-16 20:03:24 +01:00
ggow	80b52876c0	Add trapz pre-generated header	2019-04-16 19:19:55 +01:00
ggow	83f9180b2e	Initial commit	2019-04-15 22:58:31 +01:00