ASoC: wm8904: Correct number of EQ registers
commit 97aff2c03a1e4d343266adadb52313613efb027f upstream. There are 24 EQ registers not 25, I suspect this bug came about because the registers start at EQ1 not zero. The bug is relatively harmless as the extra register written is an unused one. Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Greg Kroah-Hartman
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@@ -119,7 +119,7 @@
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#define WM8904_MIC_REGS 2
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#define WM8904_GPIO_REGS 4
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#define WM8904_DRC_REGS 4
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#define WM8904_EQ_REGS 25
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#define WM8904_EQ_REGS 24
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/**
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* DRC configurations are specified with a label and a set of register
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