Stricted
245 lines
6.7 KiB
C
245 lines
6.7 KiB
C
/**
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* @file
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* hal_api.h
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*
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* @par Project:
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* Video
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*
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* @par Description:
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* Hardware Abstraction Layer API for external use
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*
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* @par Author:
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* Jackal Chen (mtk02532)
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*
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* @par $Revision: #1 $
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* @par $Modtime:$
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* @par $Log:$
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*
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*/
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#ifndef _HAL_API_H_
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#define _HAL_API_H_
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#include "val_types_public.h"
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#define DumpReg__ ///< Dump Reg for debug
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#ifdef DumpReg__
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#include <stdio.h>
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define ADD_QUEUE(queue, index, q_type, q_address, q_offset, q_value, q_mask) \
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{ \
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queue[index].type = q_type; \
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queue[index].address = q_address; \
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queue[index].offset = q_offset; \
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queue[index].value = q_value; \
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queue[index].mask = q_mask; \
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index = index + 1; \
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} ///< ADD QUEUE command
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/**
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* @par Enumeration
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* HAL_CODEC_TYPE_T
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* @par Description
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* This is the item used for codec type
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*/
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typedef enum __HAL_CODEC_TYPE_T
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{
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HAL_CODEC_TYPE_VDEC, ///< VDEC
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HAL_CODEC_TYPE_VENC, ///< VENC
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HAL_CODEC_TYPE_MAX = 0xFFFFFFFF ///< MAX Value
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}
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HAL_CODEC_TYPE_T;
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/**
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* @par Enumeration
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* HAL_CMD_T
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* @par Description
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* This is the item used for hal command type
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*/
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typedef enum _HAL_CMD_T
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{
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HAL_CMD_SET_CMD_QUEUE, ///< set command queue
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HAL_CMD_SET_POWER, ///< set power
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HAL_CMD_SET_ISR, ///< set ISR
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HAL_CMD_GET_CACHE_CTRL_ADDR, ///< get cahce control address
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HAL_CMD_MAX = 0xFFFFFFFF ///< MAX value
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} HAL_CMD_T;
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/**
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* @par Enumeration
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* REGISTER_GROUP_T
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* @par Description
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* This is the item used for register group
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*/
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typedef enum _REGISTER_GROUP_T
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{
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VDEC_SYS, ///< VDEC_SYS
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VDEC_MISC, ///< VDEC_MISC
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VDEC_VLD, ///< VDEC_VLD
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VDEC_VLD_TOP, ///< VDEC_VLD_TOP
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VDEC_MC, ///< VDEC_MC
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VDEC_AVC_VLD, ///< VDEC_AVC_VLD
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VDEC_AVC_MV, ///< VDEC_AVC_MV
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VDEC_HEVC_VLD, ///< VDEC_HEVC_VLD
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VDEC_HEVC_MV, ///< VDEC_HEVC_MV
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VDEC_PP, ///< VDEC_PP
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// VDEC_SQT,
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VDEC_VP8_VLD, ///< VDEC_VP8_VLD
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VDEC_VP6_VLD, ///< VDEC_VP6_VLD
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VDEC_VP8_VLD2, ///< VDEC_VP8_VLD2
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VENC_HW_BASE, ///< VENC_HW_BASE
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VENC_MP4_HW_BASE, ///< VENC_MP4_HW_BASE
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VCODEC_MAX ///< VCODEC_MAX
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} REGISTER_GROUP_T;
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/**
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* @par Enumeration
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* REGISTER_GROUP_T
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* @par Description
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* This is the item used for driver command type
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*/
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typedef enum _VCODEC_DRV_CMD_TYPE
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{
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ENABLE_HW_CMD, ///< ENABLE_HW_CMD
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DISABLE_HW_CMD, ///< DISABLE_HW_CMD
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WRITE_REG_CMD, ///< WRITE_REG_CMD
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READ_REG_CMD, ///< READ_REG_CMD
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WRITE_SYSRAM_CMD, ///< WRITE_SYSRAM_CMD
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READ_SYSRAM_CMD, ///< READ_SYSRAM_CMD
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MASTER_WRITE_CMD, ///< MASTER_WRITE_CMD
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WRITE_SYSRAM_RANGE_CMD, ///< WRITE_SYSRAM_RANGE_CMD
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READ_SYSRAM_RANGE_CMD, ///< READ_SYSRAM_RANGE_CMD
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SETUP_ISR_CMD, ///< SETUP_ISR_CMD
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WAIT_ISR_CMD, ///< WAIT_ISR_CMD
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TIMEOUT_CMD, ///< TIMEOUT_CMD
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MB_CMD, ///< MB_CMD
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POLL_REG_STATUS_CMD, ///< POLL_REG_STATUS_CMD
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END_CMD ///< END_CMD
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} VCODEC_DRV_CMD_TYPE;
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/**
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* @par Structure
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* P_VCODEC_DRV_CMD_T
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* @par Description
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* Pointer of VCODEC_DRV_CMD_T
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*/
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typedef struct __VCODEC_DRV_CMD_T *P_VCODEC_DRV_CMD_T;
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/**
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* @par Structure
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* VCODEC_DRV_CMD_T
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* @par Description
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* driver command information
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*/
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typedef struct __VCODEC_DRV_CMD_T
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{
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VAL_UINT32_T type; ///< type
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VAL_ULONG_T address; ///< address
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VAL_ULONG_T offset; ///< offset
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VAL_ULONG_T value; ///< value
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VAL_ULONG_T mask; ///< mask
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} VCODEC_DRV_CMD_T;
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/**
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* @par Structure
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* HAL_HANDLE_T
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* @par Description
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* hal handle information
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*/
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typedef struct _HAL_HANDLE_T_
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{
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VAL_INT32_T fd_vdec; ///< fd_vdec
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VAL_INT32_T fd_venc; ///< fd_venc
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VAL_MEMORY_T rHandleMem; ///< rHandleMem
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VAL_ULONG_T mmap[VCODEC_MAX]; ///< mmap[VCODEC_MAX]
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VAL_DRIVER_TYPE_T driverType; ///< driverType
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VAL_UINT32_T u4TimeOut; ///< u4TimeOut
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VAL_UINT32_T u4FrameCount; ///< u4FrameCount
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#ifdef DumpReg__
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FILE *pf_out; ///< pf_out
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#endif
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VAL_BOOL_T bProfHWTime; ///< bProfHWTime
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VAL_UINT64_T u8HWTime[2]; ///< u8HWTime
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} HAL_HANDLE_T;
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/**
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* @par Function
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* eHalInit
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* @par Description
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* The init hal driver function
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* @param
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* a_phHalHandle [IN/OUT] The hal handle
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* @param
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* a_eHalCodecType [IN] VDEC or VENC
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* @par Returns
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* VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return VAL_RESULT_INVALID_DRIVER or VAL_RESULT_INVALID_MEMORY if failed
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*/
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VAL_RESULT_T eHalInit(VAL_HANDLE_T *a_phHalHandle, HAL_CODEC_TYPE_T a_eHalCodecType);
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/**
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* @par Function
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* eHalDeInit
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* @par Description
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* The deinit hal driver function
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* @param
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* a_phHalHandle [IN/OUT] The hal handle
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* @par Returns
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* VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return else if failed
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*/
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VAL_RESULT_T eHalDeInit(VAL_HANDLE_T *a_phHalHandle);
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/**
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* @par Function
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* eHalGetMMAP
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* @par Description
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* The get hw register memory map to vitural address function
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* @param
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* a_hHalHandle [IN/OUT] The hal handle
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* @param
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* RegAddr [IN] hw register address
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* @par Returns
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* VAL_UINT32_T, vitural address of hw register memory mapping
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*/
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VAL_ULONG_T eHalGetMMAP(VAL_HANDLE_T *a_hHalHandle, VAL_UINT32_T RegAddr);
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/**
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* @par Function
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* eHalCmdProc
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* @par Description
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* The hal command processing function
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* @param
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* a_hHalHandle [IN/OUT] The hal handle
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* @param
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* a_eHalCmd [IN] The hal command structure
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* @param
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* a_pvInParam [IN] The hal input parameter
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* @param
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* a_pvOutParam [OUT] The hal output parameter
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* @par Returns
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* VAL_RESULT_T, return VAL_RESULT_NO_ERROR if success, return else if failed
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*/
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VAL_RESULT_T eHalCmdProc(VAL_HANDLE_T *a_hHalHandle, HAL_CMD_T a_eHalCmd, VAL_VOID_T *a_pvInParam, VAL_VOID_T *a_pvOutParam);
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#ifdef __cplusplus
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}
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#endif
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#endif // #ifndef _HAL_API_H_
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