David Woodhouse 241651d04d
[MTD] Fix CFI build error when no map width or interleave supported ...
When building NOR flash support, you have compile-time options for the
bus width and the number of individual chips which are interleaved
together onto that bus. The code to deal with arbitrary geometry is a
bit convoluted, and people want to just configure it for the specific
hardware they have, to avoid the runtime overhead.
Selecting _none_ of the available options doesn't make any sense. You
should have at least one. This makes it build though, since people
persist in trying.
Signed-off-by: David Woodhouse <dwmw2@infradead.org >
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David Woodhouse
241651d04d