Michel Dänzer 51f2df44a3 drm/ttm: Make sure BOs being swapped out are cacheable ...

commit 239ac65fa5ffab71adf66e642750f940e7241d99 upstream.

The current caching state may not be tt_cached, even though the
placement contains TTM_PL_FLAG_CACHED, because placement can contain
multiple caching flags. Trying to swap out such a BO would trip up the

	BUG_ON(ttm->caching_state != tt_cached);

in ttm_tt_swapout.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Willy Tarreau <w@1wt.eu>

2017-06-20 14:04:27 +02:00

..

drm

drm/ttm: Make sure BOs being swapped out are cacheable

2017-06-20 14:04:27 +02:00

host1x

gpu: host1x: handle the correct # of syncpt regs

2014-06-07 13:25:30 -07:00

vga

vgaarb: fix signal handling in vga_get()

2016-03-03 15:06:22 -08:00

Makefile

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